spinlock_t rx_lock;
struct napi_struct napi[__MT_RXQ_MAX];
struct sk_buff_head rx_skb[__MT_RXQ_MAX];
+ struct tasklet_struct irq_tasklet;
struct list_head txwi_cache;
struct list_head rxwi_cache;
if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state))
return IRQ_NONE;
- tasklet_schedule(&dev->irq_tasklet);
+ tasklet_schedule(&dev->mt76.irq_tasklet);
return IRQ_HANDLED;
}
static void mt7615_irq_tasklet(struct tasklet_struct *t)
{
- struct mt7615_dev *dev = from_tasklet(dev, t, irq_tasklet);
+ struct mt7615_dev *dev = from_tasklet(dev, t, mt76.irq_tasklet);
u32 intr, mask = 0, tx_mcu_mask = mt7615_tx_mcu_int_mask(dev);
u32 mcu_int;
dev = container_of(mdev, struct mt7615_dev, mt76);
mt76_mmio_init(&dev->mt76, mem_base);
- tasklet_setup(&dev->irq_tasklet, mt7615_irq_tasklet);
+ tasklet_setup(&mdev->irq_tasklet, mt7615_irq_tasklet);
dev->reg_map = map;
dev->ops = ops;
};
const struct mt76_bus_ops *bus_ops;
- struct tasklet_struct irq_tasklet;
-
struct mt7615_phy phy;
u64 omac_mask;
{
mt76_set_irq_mask(&dev->mt76, 0, 0, mask);
- tasklet_schedule(&dev->irq_tasklet);
+ tasklet_schedule(&dev->mt76.irq_tasklet);
}
static inline bool mt7615_firmware_offload(struct mt7615_dev *dev)
mt76_for_each_q_rx(mdev, i) {
napi_disable(&mdev->napi[i]);
}
- tasklet_kill(&dev->irq_tasklet);
+ tasklet_kill(&mdev->irq_tasklet);
mt7615_dma_reset(dev);
mt7615_tx_token_put(dev);
mt7615_dma_cleanup(dev);
- tasklet_disable(&dev->irq_tasklet);
+ tasklet_disable(&dev->mt76.irq_tasklet);
mt76_free_device(&dev->mt76);
}
mt7915_mcu_exit(dev);
mt7915_tx_token_put(dev);
mt7915_dma_cleanup(dev);
- tasklet_disable(&dev->irq_tasklet);
+ tasklet_disable(&dev->mt76.irq_tasklet);
if (is_mt7986(&dev->mt76))
mt7986_wmac_disable(dev);
}
local_bh_enable();
- tasklet_schedule(&dev->irq_tasklet);
+ tasklet_schedule(&dev->mt76.irq_tasklet);
mt76_wr(dev, MT_MCU_INT_EVENT, MT_MCU_INT_EVENT_RESET_DONE);
mt7915_wait_reset_state(dev, MT_MCU_CMD_NORMAL_STATE);
/* TODO: support 2/4/6/8 MSI-X vectors */
static void mt7915_irq_tasklet(struct tasklet_struct *t)
{
- struct mt7915_dev *dev = from_tasklet(dev, t, irq_tasklet);
+ struct mt7915_dev *dev = from_tasklet(dev, t, mt76.irq_tasklet);
struct mtk_wed_device *wed = &dev->mt76.mmio.wed;
u32 intr, intr1, mask;
if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state))
return IRQ_NONE;
- tasklet_schedule(&dev->irq_tasklet);
+ tasklet_schedule(&dev->mt76.irq_tasklet);
return IRQ_HANDLED;
}
if (ret)
goto error;
- tasklet_setup(&dev->irq_tasklet, mt7915_irq_tasklet);
+ tasklet_setup(&mdev->irq_tasklet, mt7915_irq_tasklet);
return dev;
u32 wfdma_mask;
const struct mt76_bus_ops *bus_ops;
- struct tasklet_struct irq_tasklet;
struct mt7915_phy phy;
/* monitor rx chain configured channel */
else
mt76_set_irq_mask(&dev->mt76, 0, 0, mask);
- tasklet_schedule(&dev->irq_tasklet);
+ tasklet_schedule(&dev->mt76.irq_tasklet);
}
static inline void mt7915_irq_disable(struct mt7915_dev *dev, u32 mask)
const struct mt76_bus_ops *bus_ops;
struct mt7921_phy phy;
- struct tasklet_struct irq_tasklet;
struct work_struct reset_work;
bool hw_full_reset:1;
{
mt76_set_irq_mask(&dev->mt76, 0, 0, mask);
- tasklet_schedule(&dev->irq_tasklet);
+ tasklet_schedule(&dev->mt76.irq_tasklet);
}
static inline u32
if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state))
return IRQ_NONE;
- tasklet_schedule(&dev->irq_tasklet);
+ tasklet_schedule(&dev->mt76.irq_tasklet);
return IRQ_HANDLED;
}
mt7921_wfsys_reset(dev);
skb_queue_purge(&dev->mt76.mcu.res_q);
- tasklet_disable(&dev->irq_tasklet);
+ tasklet_disable(&dev->mt76.irq_tasklet);
}
static u32 __mt7921_reg_addr(struct mt7921_dev *dev, u32 addr)
dev->fw_features = features;
dev->hif_ops = &mt7921_pcie_ops;
mt76_mmio_init(&dev->mt76, pcim_iomap_table(pdev)[0]);
- tasklet_init(&dev->irq_tasklet, mt7921_irq_tasklet, (unsigned long)dev);
+ tasklet_init(&mdev->irq_tasklet, mt7921_irq_tasklet, (unsigned long)dev);
dev->phy.dev = dev;
dev->phy.mt76 = &dev->mt76.phy;
mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0);
mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0x0);
synchronize_irq(pdev->irq);
- tasklet_kill(&dev->irq_tasklet);
+ tasklet_kill(&mdev->irq_tasklet);
err = mt7921_mcu_fw_pmctrl(dev);
if (err)
mt7996_mcu_exit(dev);
mt7996_tx_token_put(dev);
mt7996_dma_cleanup(dev);
- tasklet_disable(&dev->irq_tasklet);
+ tasklet_disable(&dev->mt76.irq_tasklet);
mt76_free_device(&dev->mt76);
}
}
local_bh_enable();
- tasklet_schedule(&dev->irq_tasklet);
+ tasklet_schedule(&dev->mt76.irq_tasklet);
mt76_wr(dev, MT_MCU_INT_EVENT, MT_MCU_INT_EVENT_RESET_DONE);
mt7996_wait_reset_state(dev, MT_MCU_CMD_NORMAL_STATE);
/* TODO: support 2/4/6/8 MSI-X vectors */
static void mt7996_irq_tasklet(struct tasklet_struct *t)
{
- struct mt7996_dev *dev = from_tasklet(dev, t, irq_tasklet);
+ struct mt7996_dev *dev = from_tasklet(dev, t, mt76.irq_tasklet);
u32 i, intr, mask, intr1;
mt76_wr(dev, MT_INT_MASK_CSR, 0);
if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state))
return IRQ_NONE;
- tasklet_schedule(&dev->irq_tasklet);
+ tasklet_schedule(&dev->mt76.irq_tasklet);
return IRQ_HANDLED;
}
if (ret)
goto error;
- tasklet_setup(&dev->irq_tasklet, mt7996_irq_tasklet);
+ tasklet_setup(&mdev->irq_tasklet, mt7996_irq_tasklet);
mt76_wr(dev, MT_INT_MASK_CSR, 0);
u32 q_wfdma_mask;
const struct mt76_bus_ops *bus_ops;
- struct tasklet_struct irq_tasklet;
struct mt7996_phy phy;
/* monitor rx chain configured channel */
else
mt76_set_irq_mask(&dev->mt76, 0, 0, mask);
- tasklet_schedule(&dev->irq_tasklet);
+ tasklet_schedule(&dev->mt76.irq_tasklet);
}
static inline void mt7996_irq_disable(struct mt7996_dev *dev, u32 mask)