arm64: dts: rockchip: change gpio nodenames
authorJohan Jonker <jbx6244@gmail.com>
Thu, 7 Oct 2021 14:40:19 +0000 (16:40 +0200)
committerHeiko Stuebner <heiko@sntech.de>
Sun, 17 Oct 2021 07:50:36 +0000 (09:50 +0200)
Currently all gpio nodenames are sort of identical to there label.
Nodenames should be of a generic type, so change them all.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20211007144019.7461-3-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/px30.dtsi
arch/arm64/boot/dts/rockchip/rk3308.dtsi
arch/arm64/boot/dts/rockchip/rk3328.dtsi
arch/arm64/boot/dts/rockchip/rk3368.dtsi
arch/arm64/boot/dts/rockchip/rk3399.dtsi

index 772989f4b961c53d71cea4c8c5c74fc13c9d5ab2..00f50b05d55a3639eb5c83ef83d5d5c8d69637f7 100644 (file)
                #size-cells = <2>;
                ranges;
 
-               gpio0: gpio0@ff040000 {
+               gpio0: gpio@ff040000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff040000 0x0 0x100>;
                        interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio1: gpio1@ff250000 {
+               gpio1: gpio@ff250000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff250000 0x0 0x100>;
                        interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio2: gpio2@ff260000 {
+               gpio2: gpio@ff260000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff260000 0x0 0x100>;
                        interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio3: gpio3@ff270000 {
+               gpio3: gpio@ff270000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff270000 0x0 0x100>;
                        interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
index 7ba9ce4e98262ce2d508f110dc6091b41b69368c..1cbe2126186eecb720dd32735feab5ddb2739e47 100644 (file)
                #size-cells = <2>;
                ranges;
 
-               gpio0: gpio0@ff220000 {
+               gpio0: gpio@ff220000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff220000 0x0 0x100>;
                        interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio1: gpio1@ff230000 {
+               gpio1: gpio@ff230000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff230000 0x0 0x100>;
                        interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio2: gpio2@ff240000 {
+               gpio2: gpio@ff240000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff240000 0x0 0x100>;
                        interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio3: gpio3@ff250000 {
+               gpio3: gpio@ff250000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff250000 0x0 0x100>;
                        interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio4: gpio4@ff260000 {
+               gpio4: gpio@ff260000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff260000 0x0 0x100>;
                        interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
index 11f4ac3ab2b3da98320727d75e421ff44077ab38..39db0b85b4da2a730a9982c47452406886d33f06 100644 (file)
                #size-cells = <2>;
                ranges;
 
-               gpio0: gpio0@ff210000 {
+               gpio0: gpio@ff210000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff210000 0x0 0x100>;
                        interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio1: gpio1@ff220000 {
+               gpio1: gpio@ff220000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff220000 0x0 0x100>;
                        interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio2: gpio2@ff230000 {
+               gpio2: gpio@ff230000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff230000 0x0 0x100>;
                        interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
                        #interrupt-cells = <2>;
                };
 
-               gpio3: gpio3@ff240000 {
+               gpio3: gpio@ff240000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff240000 0x0 0x100>;
                        interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
index 79ee6878b2f27921f44460643ab99e81f2a760d2..c99da90328e95ba74bcf98ad5df593c96feb467d 100644 (file)
                #size-cells = <0x2>;
                ranges;
 
-               gpio0: gpio0@ff750000 {
+               gpio0: gpio@ff750000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff750000 0x0 0x100>;
                        clocks = <&cru PCLK_GPIO0>;
                        #interrupt-cells = <0x2>;
                };
 
-               gpio1: gpio1@ff780000 {
+               gpio1: gpio@ff780000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff780000 0x0 0x100>;
                        clocks = <&cru PCLK_GPIO1>;
                        #interrupt-cells = <0x2>;
                };
 
-               gpio2: gpio2@ff790000 {
+               gpio2: gpio@ff790000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff790000 0x0 0x100>;
                        clocks = <&cru PCLK_GPIO2>;
                        #interrupt-cells = <0x2>;
                };
 
-               gpio3: gpio3@ff7a0000 {
+               gpio3: gpio@ff7a0000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff7a0000 0x0 0x100>;
                        clocks = <&cru PCLK_GPIO3>;
index eaf569674db2d668afa72051586b2489534fd163..721bc2b5a9a6d646d679fae17d92439ca4a7e343 100644 (file)
                #size-cells = <2>;
                ranges;
 
-               gpio0: gpio0@ff720000 {
+               gpio0: gpio@ff720000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff720000 0x0 0x100>;
                        clocks = <&pmucru PCLK_GPIO0_PMU>;
                        #interrupt-cells = <0x2>;
                };
 
-               gpio1: gpio1@ff730000 {
+               gpio1: gpio@ff730000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff730000 0x0 0x100>;
                        clocks = <&pmucru PCLK_GPIO1_PMU>;
                        #interrupt-cells = <0x2>;
                };
 
-               gpio2: gpio2@ff780000 {
+               gpio2: gpio@ff780000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff780000 0x0 0x100>;
                        clocks = <&cru PCLK_GPIO2>;
                        #interrupt-cells = <0x2>;
                };
 
-               gpio3: gpio3@ff788000 {
+               gpio3: gpio@ff788000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff788000 0x0 0x100>;
                        clocks = <&cru PCLK_GPIO3>;
                        #interrupt-cells = <0x2>;
                };
 
-               gpio4: gpio4@ff790000 {
+               gpio4: gpio@ff790000 {
                        compatible = "rockchip,gpio-bank";
                        reg = <0x0 0xff790000 0x0 0x100>;
                        clocks = <&cru PCLK_GPIO4>;