drm/amdgpu/gmc10: program the smallK fragment size
authorAlex Deucher <alexander.deucher@amd.com>
Fri, 22 May 2020 22:14:32 +0000 (18:14 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 28 May 2020 21:47:50 +0000 (17:47 -0400)
Explicitly set the smallk size to 0 (4k).  This is the hw
default, but set it anyway just in case something else
changed it.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

index cc866c36793946e5621630e6be0ec2a350f0b056..6939edfc5232325402b4daf0e4f0d2891da610f5 100644 (file)
@@ -181,6 +181,10 @@ static void gfxhub_v2_0_init_cache_regs(struct amdgpu_device *adev)
        tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL4, VMC_TAP_PDE_REQUEST_PHYSICAL, 0);
        tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL4, VMC_TAP_PTE_REQUEST_PHYSICAL, 0);
        WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL4, tmp);
+
+       tmp = mmGCVM_L2_CNTL5_DEFAULT;
+       tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL5, L2_CACHE_SMALLK_FRAGMENT_SIZE, 0);
+       WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL5, tmp);
 }
 
 static void gfxhub_v2_0_enable_system_domain(struct amdgpu_device *adev)
index fb3f228458e5c282fbdd957937e96ebe526df4f6..616309e85d6e26e1c46292d0f29d115602c0638f 100644 (file)
@@ -164,6 +164,10 @@ static void mmhub_v2_0_init_cache_regs(struct amdgpu_device *adev)
        tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL4, VMC_TAP_PDE_REQUEST_PHYSICAL, 0);
        tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL4, VMC_TAP_PTE_REQUEST_PHYSICAL, 0);
        WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL4, tmp);
+
+       tmp = mmMMVM_L2_CNTL5_DEFAULT;
+       tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL5, L2_CACHE_SMALLK_FRAGMENT_SIZE, 0);
+       WREG32_SOC15(GC, 0, mmMMVM_L2_CNTL5, tmp);
 }
 
 static void mmhub_v2_0_enable_system_domain(struct amdgpu_device *adev)