drm/amd/display: add plane HDR multiplier driver-specific property
authorJoshua Ashton <joshua@froggi.es>
Thu, 16 Nov 2023 19:57:48 +0000 (18:57 -0100)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 13 Dec 2023 20:09:55 +0000 (15:09 -0500)
Multiplier to 'gain' the plane. When PQ is decoded using the fixed func
transfer function to the internal FP16 fb, 1.0 -> 80 nits (on AMD at
least) When sRGB is decoded, 1.0 -> 1.0.  Therefore, 1.0 multiplier = 80
nits for SDR content. So if you want, 203 nits for SDR content, pass in
(203.0 / 80.0).

v4:
- comment about the PQ TF need for L-to-NL (from Harry's review)

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Joshua Ashton <joshua@froggi.es>
Co-developed-by: Melissa Wen <mwen@igalia.com>
Signed-off-by: Melissa Wen <mwen@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

index a1b7ae5c214927e9dfa8415e06efd7d9e297e0a3..218623e1b9aac2639b25527747beac5a3906bb6f 100644 (file)
@@ -360,6 +360,10 @@ struct amdgpu_mode_info {
         * to go from scanout/encoded values to linear values.
         */
        struct drm_property *plane_degamma_tf_property;
+       /**
+        * @plane_hdr_mult_property:
+        */
+       struct drm_property *plane_hdr_mult_property;
 };
 
 #define AMDGPU_MAX_BL_LEVEL 0xFF
index baa73a6f47a9a9125724cdb0c6144741050b6c43..d36d68d517a8108003f582ceeb95850f27413b0b 100644 (file)
@@ -55,6 +55,9 @@
 #define HDMI_AMD_VENDOR_SPECIFIC_DATA_BLOCK_IEEE_REGISTRATION_ID 0x00001A
 #define AMD_VSDB_VERSION_3_FEATURECAP_REPLAYMODE 0x40
 #define HDMI_AMD_VENDOR_SPECIFIC_DATA_BLOCK_VERSION_3 0x3
+
+#define AMDGPU_HDR_MULT_DEFAULT (0x100000000LL)
+
 /*
 #include "include/amdgpu_dal_power_if.h"
 #include "amdgpu_dm_irq.h"
@@ -767,6 +770,20 @@ struct dm_plane_state {
         * linearize.
         */
        enum amdgpu_transfer_function degamma_tf;
+       /**
+        * @hdr_mult:
+        *
+        * Multiplier to 'gain' the plane.  When PQ is decoded using the fixed
+        * func transfer function to the internal FP16 fb, 1.0 -> 80 nits (on
+        * AMD at least). When sRGB is decoded, 1.0 -> 1.0, obviously.
+        * Therefore, 1.0 multiplier = 80 nits for SDR content.  So if you
+        * want, 203 nits for SDR content, pass in (203.0 / 80.0).  Format is
+        * S31.32 sign-magnitude.
+        *
+        * HDR multiplier can wide range beyond [0.0, 1.0]. This means that PQ
+        * TF is needed for any subsequent linear-to-non-linear transforms.
+        */
+       __u64 hdr_mult;
 };
 
 struct dm_crtc_state {
index 49faaf606cfec8ee155ba2d2df23399e9842f98a..b5b34a9209e4d4b1b62deaaf238d2ace7b4c7312 100644 (file)
@@ -225,6 +225,12 @@ amdgpu_dm_create_color_properties(struct amdgpu_device *adev)
                return -ENOMEM;
        adev->mode_info.plane_degamma_tf_property = prop;
 
+       prop = drm_property_create_range(adev_to_drm(adev),
+                                        0, "AMD_PLANE_HDR_MULT", 0, U64_MAX);
+       if (!prop)
+               return -ENOMEM;
+       adev->mode_info.plane_hdr_mult_property = prop;
+
        return 0;
 }
 #endif
index d5e12e05d161b8fa2fd325e76ab1e1c3c09ae9d1..45a2c9b36630df3456792dc747a16237ccc2e9fb 100644 (file)
@@ -1342,6 +1342,7 @@ static void amdgpu_dm_plane_drm_plane_reset(struct drm_plane *plane)
 
        __drm_atomic_helper_plane_reset(plane, &amdgpu_state->base);
        amdgpu_state->degamma_tf = AMDGPU_TRANSFER_FUNCTION_DEFAULT;
+       amdgpu_state->hdr_mult = AMDGPU_HDR_MULT_DEFAULT;
 }
 
 static struct drm_plane_state *amdgpu_dm_plane_drm_plane_duplicate_state(struct drm_plane *plane)
@@ -1365,6 +1366,7 @@ static struct drm_plane_state *amdgpu_dm_plane_drm_plane_duplicate_state(struct
                        drm_property_blob_get(old_dm_plane_state->degamma_lut);
 
        dm_plane_state->degamma_tf = old_dm_plane_state->degamma_tf;
+       dm_plane_state->hdr_mult = old_dm_plane_state->hdr_mult;
 
        return &dm_plane_state->base;
 }
@@ -1464,6 +1466,10 @@ dm_atomic_plane_attach_color_mgmt_properties(struct amdgpu_display_manager *dm,
                                           dm->adev->mode_info.plane_degamma_tf_property,
                                           AMDGPU_TRANSFER_FUNCTION_DEFAULT);
        }
+       /* HDR MULT is always available */
+       drm_object_attach_property(&plane->base,
+                                  dm->adev->mode_info.plane_hdr_mult_property,
+                                  AMDGPU_HDR_MULT_DEFAULT);
 }
 
 static int
@@ -1490,6 +1496,11 @@ dm_atomic_plane_set_property(struct drm_plane *plane,
                        dm_plane_state->degamma_tf = val;
                        dm_plane_state->base.color_mgmt_changed = 1;
                }
+       } else if (property == adev->mode_info.plane_hdr_mult_property) {
+               if (dm_plane_state->hdr_mult != val) {
+                       dm_plane_state->hdr_mult = val;
+                       dm_plane_state->base.color_mgmt_changed = 1;
+               }
        } else {
                drm_dbg_atomic(plane->dev,
                               "[PLANE:%d:%s] unknown property [PROP:%d:%s]]\n",
@@ -1515,6 +1526,8 @@ dm_atomic_plane_get_property(struct drm_plane *plane,
                        dm_plane_state->degamma_lut->base.id : 0;
        } else if (property == adev->mode_info.plane_degamma_tf_property) {
                *val = dm_plane_state->degamma_tf;
+       } else if (property == adev->mode_info.plane_hdr_mult_property) {
+               *val = dm_plane_state->hdr_mult;
        } else {
                return -EINVAL;
        }