drm/msm/disp/dpu1: add intf offsets for SC7280 target

Interface block offsets are different for SC7280 family
when compared to existing targets. These offset values
are used to access the interface irq registers. This
change adds proper interface offsets for SC7280 target.

Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
Link: https://lore.kernel.org/r/1617685792-14376-3-git-send-email-mkrishn@codeaurora.org
Signed-off-by: Rob Clark <robdclark@chromium.org>

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
index 5c521de715670726e0435ea3445b262c40234e0f..c289b7efba9a7b20dfaa8aa74565e35892553175 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
@@ -25,6 +25,9 @@
 #define MDP_AD4_INTR_EN_OFF            0x41c
 #define MDP_AD4_INTR_CLEAR_OFF         0x424
 #define MDP_AD4_INTR_STATUS_OFF                0x420
+#define MDP_INTF_0_OFF_REV_7xxx             0x34000
+#define MDP_INTF_1_OFF_REV_7xxx             0x35000
+#define MDP_INTF_5_OFF_REV_7xxx             0x39000
 
 /**
  * WB interrupt status bit definitions
@@ -242,7 +245,22 @@ static const struct dpu_intr_reg dpu_intr_set[] = {
                MDP_AD4_1_OFF + MDP_AD4_INTR_CLEAR_OFF,
                MDP_AD4_1_OFF + MDP_AD4_INTR_EN_OFF,
                MDP_AD4_1_OFF + MDP_AD4_INTR_STATUS_OFF,
-       }
+       },
+       {
+               MDP_INTF_0_OFF_REV_7xxx+INTF_INTR_CLEAR,
+               MDP_INTF_0_OFF_REV_7xxx+INTF_INTR_EN,
+               MDP_INTF_0_OFF_REV_7xxx+INTF_INTR_STATUS
+       },
+       {
+               MDP_INTF_1_OFF_REV_7xxx+INTF_INTR_CLEAR,
+               MDP_INTF_1_OFF_REV_7xxx+INTF_INTR_EN,
+               MDP_INTF_1_OFF_REV_7xxx+INTF_INTR_STATUS
+       },
+       {
+               MDP_INTF_5_OFF_REV_7xxx+INTF_INTR_CLEAR,
+               MDP_INTF_5_OFF_REV_7xxx+INTF_INTR_EN,
+               MDP_INTF_5_OFF_REV_7xxx+INTF_INTR_STATUS
+       },
 };
 
 /*