remoteproc: qcom: q6v5-mss: Add support for MSM8909

Port the initialization sequence necessary for booting the modem remote
processor on the MSM8909 SoC from Qualcomm's msm-3.10 release [1].
The sequence is actually similar to the existing one for MSM8996 and
MSM8998 except that there is no separate QDSP6SS_MEM_PWR_CTL register
and most of the "memories" are enabled at once instead of sequentially.

To reuse the existing code just insert some if statements where needed
and add a configuration similar to the one from MSM8916.

[1]: https://git.codelinaro.org/clo/la/kernel/msm-3.10/-/commit/56dcedc8dac8abff6b007f76a29430b2d0a44704

Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220908182433.466908-6-stephan.gerhold@kernkonzept.com

diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c
index fddb63cffee0781f23e7c88e951cb164dac0012b..2555f06dfc7411a26b1a30a34edab5c536cfaac5 100644 (file)
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -111,6 +111,9 @@
 #define QDSS_BHS_ON                    BIT(21)
 #define QDSS_LDO_BYP                   BIT(22)
 
+/* QDSP6v55 parameters */
+#define QDSP6V55_MEM_BITS              GENMASK(16, 8)
+
 /* QDSP6v56 parameters */
 #define QDSP6v56_LDO_BYP               BIT(25)
 #define QDSP6v56_BHS_ON                BIT(24)
@@ -234,6 +237,7 @@ struct q6v5 {
 };
 
 enum {
+       MSS_MSM8909,
        MSS_MSM8916,
        MSS_MSM8974,
        MSS_MSM8996,
@@ -687,13 +691,14 @@ static int q6v5proc_reset(struct q6v5 *qproc)
                        return ret;
                }
                goto pbl_wait;
-       } else if (qproc->version == MSS_MSM8996 ||
+       } else if (qproc->version == MSS_MSM8909 ||
+                  qproc->version == MSS_MSM8996 ||
                   qproc->version == MSS_MSM8998) {
-               int mem_pwr_ctl;
 
-               /* Override the ACC value if required */
-               writel(QDSP6SS_ACC_OVERRIDE_VAL,
-                      qproc->reg_base + QDSP6SS_STRAP_ACC);
+               if (qproc->version != MSS_MSM8909)
+                       /* Override the ACC value if required */
+                       writel(QDSP6SS_ACC_OVERRIDE_VAL,
+                              qproc->reg_base + QDSP6SS_STRAP_ACC);
 
                /* Assert resets, stop core */
                val = readl(qproc->reg_base + QDSP6SS_RESET_REG);
@@ -725,36 +730,53 @@ static int q6v5proc_reset(struct q6v5 *qproc)
                val |= QDSP6v56_LDO_BYP;
                writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
 
-               /* Deassert QDSP6 compiler memory clamp */
-               val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG);
-               val &= ~QDSP6v56_CLAMP_QMC_MEM;
-               writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
-
-               /* Deassert memory peripheral sleep and L2 memory standby */
-               val |= Q6SS_L2DATA_STBY_N | Q6SS_SLP_RET_N;
-               writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
-
-               /* Turn on L1, L2, ETB and JU memories 1 at a time */
-               if (qproc->version == MSS_MSM8996) {
-                       mem_pwr_ctl = QDSP6SS_MEM_PWR_CTL;
-                       i = 19;
+               if (qproc->version != MSS_MSM8909) {
+                       int mem_pwr_ctl;
+
+                       /* Deassert QDSP6 compiler memory clamp */
+                       val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG);
+                       val &= ~QDSP6v56_CLAMP_QMC_MEM;
+                       writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
+
+                       /* Deassert memory peripheral sleep and L2 memory standby */
+                       val |= Q6SS_L2DATA_STBY_N | Q6SS_SLP_RET_N;
+                       writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
+
+                       /* Turn on L1, L2, ETB and JU memories 1 at a time */
+                       if (qproc->version == MSS_MSM8996) {
+                               mem_pwr_ctl = QDSP6SS_MEM_PWR_CTL;
+                               i = 19;
+                       } else {
+                               /* MSS_MSM8998 */
+                               mem_pwr_ctl = QDSP6V6SS_MEM_PWR_CTL;
+                               i = 28;
+                       }
+                       val = readl(qproc->reg_base + mem_pwr_ctl);
+                       for (; i >= 0; i--) {
+                               val |= BIT(i);
+                               writel(val, qproc->reg_base + mem_pwr_ctl);
+                               /*
+                                * Read back value to ensure the write is done then
+                                * wait for 1us for both memory peripheral and data
+                                * array to turn on.
+                                */
+                               val |= readl(qproc->reg_base + mem_pwr_ctl);
+                               udelay(1);
+                       }
                } else {
-                       /* MSS_MSM8998 */
-                       mem_pwr_ctl = QDSP6V6SS_MEM_PWR_CTL;
-                       i = 28;
-               }
-               val = readl(qproc->reg_base + mem_pwr_ctl);
-               for (; i >= 0; i--) {
-                       val |= BIT(i);
-                       writel(val, qproc->reg_base + mem_pwr_ctl);
-                       /*
-                        * Read back value to ensure the write is done then
-                        * wait for 1us for both memory peripheral and data
-                        * array to turn on.
-                        */
-                       val |= readl(qproc->reg_base + mem_pwr_ctl);
-                       udelay(1);
+                       /* Turn on memories */
+                       val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG);
+                       val |= Q6SS_SLP_RET_N | Q6SS_L2DATA_STBY_N |
+                              Q6SS_ETB_SLP_NRET_N | QDSP6V55_MEM_BITS;
+                       writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
+
+                       /* Turn on L2 banks 1 at a time */
+                       for (i = 0; i <= 7; i++) {
+                               val |= BIT(i);
+                               writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG);
+                       }
                }
+
                /* Remove word line clamp */
                val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG);
                val &= ~QDSP6v56_CLAMP_WL;
@@ -2240,6 +2262,40 @@ static const struct rproc_hexagon_res msm8996_mss = {
        .version = MSS_MSM8996,
 };
 
+static const struct rproc_hexagon_res msm8909_mss = {
+       .hexagon_mba_image = "mba.mbn",
+       .proxy_supply = (struct qcom_mss_reg_res[]) {
+               {
+                       .supply = "pll",
+                       .uA = 100000,
+               },
+               {}
+       },
+       .proxy_clk_names = (char*[]){
+               "xo",
+               NULL
+       },
+       .active_clk_names = (char*[]){
+               "iface",
+               "bus",
+               "mem",
+               NULL
+       },
+       .proxy_pd_names = (char*[]){
+               "mx",
+               "cx",
+               NULL
+       },
+       .need_mem_protection = false,
+       .has_alt_reset = false,
+       .has_mba_logs = false,
+       .has_spare_reg = false,
+       .has_qaccept_regs = false,
+       .has_ext_cntl_regs = false,
+       .has_vq6 = false,
+       .version = MSS_MSM8909,
+};
+
 static const struct rproc_hexagon_res msm8916_mss = {
        .hexagon_mba_image = "mba.mbn",
        .proxy_supply = (struct qcom_mss_reg_res[]) {
@@ -2340,6 +2396,7 @@ static const struct rproc_hexagon_res msm8974_mss = {
 
 static const struct of_device_id q6v5_of_match[] = {
        { .compatible = "qcom,q6v5-pil", .data = &msm8916_mss},
+       { .compatible = "qcom,msm8909-mss-pil", .data = &msm8909_mss},
        { .compatible = "qcom,msm8916-mss-pil", .data = &msm8916_mss},
        { .compatible = "qcom,msm8974-mss-pil", .data = &msm8974_mss},
        { .compatible = "qcom,msm8996-mss-pil", .data = &msm8996_mss},