projects
/
linux.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
9a6bd12
)
ARM: dts: bcmbca: bcm63178: fix interrupt controller node
author
William Zhang
<william.zhang@broadcom.com>
Mon, 1 Aug 2022 19:44:47 +0000
(12:44 -0700)
committer
Florian Fainelli
<f.fainelli@gmail.com>
Mon, 15 Aug 2022 16:35:53 +0000
(09:35 -0700)
Add the missing gic registers and interrupts property to the gic node.
Fixes: fc85b7e64acb ("ARM: dts: add dts files for bcmbca soc 63178")
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link:
https://lore.kernel.org/r/20220801194448.29363-3-william.zhang@broadcom.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
arch/arm/boot/dts/bcm63178.dtsi
patch
|
blob
|
history
diff --git
a/arch/arm/boot/dts/bcm63178.dtsi
b/arch/arm/boot/dts/bcm63178.dtsi
index 98ab10e1c81eb463d405c29ec9627c6f7c736003..dba71fa53466221e7684e07db72c92dfdb3fe686 100644
(file)
--- a/
arch/arm/boot/dts/bcm63178.dtsi
+++ b/
arch/arm/boot/dts/bcm63178.dtsi
@@
-86,15
+86,17
@@
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0 0x81000000 0x
4
000>;
+ ranges = <0 0x81000000 0x
8
000>;
gic: interrupt-controller@1000 {
compatible = "arm,cortex-a7-gic";
#interrupt-cells = <3>;
- #address-cells = <0>;
interrupt-controller;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_HIGH)>;
reg = <0x1000 0x1000>,
- <0x2000 0x2000>;
+ <0x2000 0x2000>,
+ <0x4000 0x2000>,
+ <0x6000 0x2000>;
};
};