health, you should probably say 'Y' here.
config EDAC_ASPEED
- tristate "Aspeed AST 2500 SoC"
- depends on MACH_ASPEED_G5
+ tristate "Aspeed AST BMC SoC"
+ depends on ARCH_ASPEED
help
- Support for error detection and correction on the Aspeed AST 2500 SoC.
+ Support for error detection and correction on the Aspeed AST BMC SoC.
First, ECC must be configured in the bootloader. Then, this driver
will expose error counters via the EDAC kernel framework.
int rc;
/* retrieve info about physical memory from device tree */
- np = of_find_node_by_path("/memory");
+ np = of_find_node_by_name(NULL, "memory");
if (!np) {
dev_err(mci->pdev, "dt: missing /memory node\n");
return -ENODEV;
static const struct of_device_id aspeed_of_match[] = {
+ { .compatible = "aspeed,ast2400-sdram-edac" },
{ .compatible = "aspeed,ast2500-sdram-edac" },
+ { .compatible = "aspeed,ast2600-sdram-edac" },
{},
};
+MODULE_DEVICE_TABLE(of, aspeed_of_match);
static struct platform_driver aspeed_driver = {
.driver = {
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Stefan Schaeckeler <sschaeck@cisco.com>");
-MODULE_DESCRIPTION("Aspeed AST2500 EDAC driver");
+MODULE_DESCRIPTION("Aspeed BMC SoC EDAC driver");
MODULE_VERSION("1.0");