[POWERPC] kexec: Send slaves to new kernel earlier

With this, when kexec-ing, we copy the code and start the slaves on
their journey to the next kernel's spin loop as soon as we copy the
kexec image into place.

The kernel doesn't know exactly which slaves are spinning in
kexec_wait.  This allows us to pass more than max-cpus to the
next kernel.  But it also means that we might leave some behind.

Moving the code here means they have the time it takes us to
clear the hash table to wake up and move on.  Moving the code
any earlier would reuqire walking the image description to
search for the code, which could span multiple pages.

Signed-off-by: Milton Miller <miltonm@bga.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>

diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index 519861da04235c2fc3a3ba13c9326f02a5af629f..bbb3ba54c51c7b331c7ce2469361b4991a02cd1e 100644 (file)
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -646,6 +646,19 @@ _GLOBAL(kexec_sequence)
        /* turn off mmu */
        bl      real_mode
 
+       /* copy  0x100 bytes starting at start to 0 */
+       li      r3,0
+       mr      r4,r30          /* start, aka phys mem offset */
+       li      r5,0x100
+       li      r6,0
+       bl      .copy_and_flush /* (dest, src, copy limit, start offset) */
+1:     /* assume normal blr return */
+
+       /* release other cpus to the new kernel secondary start at 0x60 */
+       mflr    r5
+       li      r6,1
+       stw     r6,kexec_flag-1b(5)
+
        /* clear out hardware hash page table and tlb */
        ld      r5,0(r27)               /* deref function descriptor */
        mtctr   r5
@@ -676,19 +689,6 @@ _GLOBAL(kexec_sequence)
  *    are the boot cpu ?????
  *    other device tree differences (prop sizes, va vs pa, etc)...
  */
-
-       /* copy  0x100 bytes starting at start to 0 */
-       li      r3,0
-       mr      r4,r30
-       li      r5,0x100
-       li      r6,0
-       bl      .copy_and_flush /* (dest, src, copy limit, start offset) */
-1:     /* assume normal blr return */
-
-       /* release other cpus to the new kernel secondary start at 0x60 */
-       mflr    r5
-       li      r6,1
-       stw     r6,kexec_flag-1b(5)
        mr      r3,r25  # my phys cpu
        mr      r4,r30  # start, aka phys mem offset
        mtlr    4