arm64: dts: mediatek: cherry: Add configuration for display backlight
authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Thu, 23 Feb 2023 14:54:26 +0000 (15:54 +0100)
committerMatthias Brugger <matthias.bgg@gmail.com>
Fri, 31 Mar 2023 10:45:11 +0000 (12:45 +0200)
Configure the hardware PWM for the integrated display's backlight:
all Cherry devices enable the backlight with GPIO82 and manage the
PWM via MediaTek disp-pwm on GPIO97.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20230223145426.193590-5-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi

index 24669093fbed74d6b97cc08a96dc487c49f92885..8ac80a136c3710b4350e47b9fab96ea6811c54e2 100644 (file)
                serial0 = &uart0;
        };
 
+       backlight_lcd0: backlight-lcd0 {
+               compatible = "pwm-backlight";
+               brightness-levels = <0 1023>;
+               default-brightness-level = <576>;
+               enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>;
+               num-interpolated-steps = <1023>;
+               pwms = <&disp_pwm0 0 500000>;
+               power-supply = <&ppvar_sys>;
+       };
+
        chosen {
                stdout-path = "serial0:115200n8";
        };
        };
 };
 
+&disp_pwm0 {
+       status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&disp_pwm0_pin_default>;
+};
+
 &dp_tx {
        status = "okay";
 
                };
        };
 
+       disp_pwm0_pin_default: disp-pwm0-default-pins {
+               pins-disp-pwm {
+                       pinmux = <PINMUX_GPIO82__FUNC_GPIO82>,
+                                <PINMUX_GPIO97__FUNC_DISP_PWM0>;
+               };
+       };
+
        dptx_pin: dptx-default-pins {
                pins-cmd-dat {
                        pinmux = <PINMUX_GPIO18__FUNC_DP_TX_HPD>;