tcg/riscv: Use BEXTI for single-bit extractions
authorRichard Henderson <richard.henderson@linaro.org>
Thu, 2 Jan 2025 18:16:01 +0000 (10:16 -0800)
committerRichard Henderson <richard.henderson@linaro.org>
Fri, 17 Jan 2025 04:57:17 +0000 (20:57 -0800)
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250102181601.1421059-3-richard.henderson@linaro.org>

tcg/riscv/tcg-target-has.h
tcg/riscv/tcg-target.c.inc

index 0f9cc04f8c117bdef0dc2d62ed46b099acbfd147..f35f9b31f5723b5473ba83e321f26339f6c811e1 100644 (file)
@@ -110,7 +110,13 @@ tcg_target_extract_valid(TCGType type, unsigned ofs, unsigned len)
         /* ofs > 0 uses SRLIW; ofs == 0 uses add.uw. */
         return ofs || (cpuinfo & CPUINFO_ZBA);
     }
-    return (cpuinfo & CPUINFO_ZBB) && ofs == 0 && len == 16;
+    switch (len) {
+    case 1:
+        return (cpuinfo & CPUINFO_ZBS) && ofs != 0;
+    case 16:
+        return (cpuinfo & CPUINFO_ZBB) && ofs == 0;
+    }
+    return false;
 }
 #define TCG_TARGET_extract_valid  tcg_target_extract_valid
 
index 4f6e18f59ed39f4b295f162ef483bc16dd7bd683..61dc310c1aa65a38c09c73f00d669822bd886637 100644 (file)
@@ -163,6 +163,7 @@ typedef enum {
     OPC_ANDI = 0x7013,
     OPC_AUIPC = 0x17,
     OPC_BEQ = 0x63,
+    OPC_BEXTI = 0x48005013,
     OPC_BGE = 0x5063,
     OPC_BGEU = 0x7063,
     OPC_BLT = 0x4063,
@@ -2354,9 +2355,15 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type,
         }
         /* FALLTHRU */
     case INDEX_op_extract_i32:
-        if (a2 == 0 && args[3] == 16) {
+        switch (args[3]) {
+        case 1:
+            tcg_out_opc_imm(s, OPC_BEXTI, a0, a1, a2);
+            break;
+        case 16:
+            tcg_debug_assert(a2 == 0);
             tcg_out_ext16u(s, a0, a1);
-        } else {
+            break;
+        default:
             g_assert_not_reached();
         }
         break;