octeontx2-af: Reset PTP config in FLR handler

[ Upstream commit e37e08fffc373206ad4e905c05729ea6bbdcb22c ]

Upon receiving ptp config request from netdev interface , Octeontx2 MAC
block CGX is configured to append timestamp to every incoming packet
and NPC config is updated with DMAC offset change.

Currently this configuration is not reset in FLR handler. This patch
resets the same.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Signed-off-by: Hariprasad Kelam <hkelam@marvell.com>
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index c3979ec2bb86d7a9011d6aed81f79d55c79b3e0a..8f81e468be0485b41f933c4dc6a648dd560cba8a 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -220,6 +220,7 @@ struct rvu_pfvf {
        u16             maxlen;
        u16             minlen;
 
+       bool            hw_rx_tstamp_en; /* Is rx_tstamp enabled */
        u8              mac_addr[ETH_ALEN]; /* MAC address of this PF/VF */
        u8              default_mac[ETH_ALEN]; /* MAC address from FWdata */
 

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
index 21e5906bcc37276c8ca83666087937b079869fae..a5c717ad12c1558ff6727ebd5a45b8a726991c42 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c
@@ -694,6 +694,7 @@ int rvu_mbox_handler_cgx_promisc_disable(struct rvu *rvu, struct msg_req *req,
 
 static int rvu_cgx_ptp_rx_cfg(struct rvu *rvu, u16 pcifunc, bool enable)
 {
+       struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
        int pf = rvu_get_pf(pcifunc);
        u8 cgx_id, lmac_id;
        void *cgxd;
@@ -718,6 +719,8 @@ static int rvu_cgx_ptp_rx_cfg(struct rvu *rvu, u16 pcifunc, bool enable)
         */
        if (npc_config_ts_kpuaction(rvu, pf, pcifunc, enable))
                return -EINVAL;
+       /* This flag is required to clean up CGX conf if app gets killed */
+       pfvf->hw_rx_tstamp_en = enable;
 
        return 0;
 }

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index f43df4683943d6ad47c1886384b04a328a100911..8c94e30d0499e0a61af77cad9c66a5b1054af624 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
@@ -4519,6 +4519,9 @@ void rvu_nix_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int nixlf)
 {
        struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
        struct hwctx_disable_req ctx_req;
+       int pf = rvu_get_pf(pcifunc);
+       u8 cgx_id, lmac_id;
+       void *cgxd;
        int err;
 
        ctx_req.hdr.pcifunc = pcifunc;
@@ -4559,6 +4562,17 @@ void rvu_nix_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int nixlf)
        rvu_npc_set_parse_mode(rvu, pcifunc, OTX2_PRIV_FLAGS_DEFAULT,
                               (PKIND_TX | PKIND_RX), 0, 0, 0, 0);
 
+       /* Disabling CGX and NPC config done for PTP */
+       if (pfvf->hw_rx_tstamp_en) {
+               rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
+               cgxd = rvu_cgx_pdata(cgx_id, rvu);
+               cgx_lmac_ptp_config(cgxd, lmac_id, false);
+               /* Undo NPC config done for PTP */
+               if (npc_config_ts_kpuaction(rvu, pf, pcifunc, false))
+                       dev_err(rvu->dev, "NPC config for PTP failed\n");
+               pfvf->hw_rx_tstamp_en = false;
+       }
+
        nix_ctx_free(rvu, pfvf);
 
        nix_free_all_bandprof(rvu, pcifunc);