arm64: dts: ti: k3-am642-evm: add ICSSG1 Ethernet support
authorMD Danish Anwar <danishanwar@ti.com>
Thu, 15 Feb 2024 10:30:35 +0000 (16:00 +0530)
committerVignesh Raghavendra <vigneshr@ti.com>
Mon, 19 Feb 2024 08:12:01 +0000 (13:42 +0530)
ICSSG1 provides dual Gigabit Ethernet support with proper FW loaded.

The ICSSG1 MII0 (RGMII1) has DP83869 PHY attached to it. The ICSSG1 shares
MII1 (RGMII2) PHY DP83869 with CPSW3g and it's assigned by default to
CPSW3g. The MDIO access to MII1 (RGMII2) PHY DP83869 is controlled by MDIO
bus switch and also assigned to CPSW3g. Therefore the ICSSG1 MII1 (RGMII2)
port is kept disable and ICSSG1 is enabled in single MAC mode by
default.

Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Link: https://lore.kernel.org/r/20240215103036.2825096-3-danishanwar@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
arch/arm64/boot/dts/ti/k3-am642-evm.dts

index fcadfb7a353c60bc73395f170291948d988529ad..42314c29c583b4fc1bc9128fb76750c48c0d16ef 100644 (file)
@@ -32,6 +32,7 @@
                mmc1 = &sdhci1;
                ethernet0 = &cpsw_port1;
                ethernet1 = &cpsw_port2;
+               ethernet2 = &icssg1_emac0;
        };
 
        memory@80000000 {
                max-bitrate = <5000000>;
                standby-gpios = <&exp1 9 GPIO_ACTIVE_HIGH>;
        };
+
+       icssg1_eth: icssg1-eth {
+               compatible = "ti,am642-icssg-prueth";
+               pinctrl-names = "default";
+               pinctrl-0 = <&icssg1_rgmii1_pins_default>;
+               sram = <&oc_sram>;
+               ti,prus = <&pru1_0>, <&rtu1_0>, <&tx_pru1_0>, <&pru1_1>, <&rtu1_1>, <&tx_pru1_1>;
+               firmware-name = "ti-pruss/am64x-sr2-pru0-prueth-fw.elf",
+                               "ti-pruss/am64x-sr2-rtu0-prueth-fw.elf",
+                               "ti-pruss/am64x-sr2-txpru0-prueth-fw.elf",
+                               "ti-pruss/am64x-sr2-pru1-prueth-fw.elf",
+                               "ti-pruss/am64x-sr2-rtu1-prueth-fw.elf",
+                               "ti-pruss/am64x-sr2-txpru1-prueth-fw.elf";
+
+               ti,pruss-gp-mux-sel = <2>,      /* MII mode */
+                                     <2>,
+                                     <2>,
+                                     <2>,      /* MII mode */
+                                     <2>,
+                                     <2>;
+               ti,mii-g-rt = <&icssg1_mii_g_rt>;
+               ti,mii-rt = <&icssg1_mii_rt>;
+               ti,iep = <&icssg1_iep0>,  <&icssg1_iep1>;
+               interrupt-parent = <&icssg1_intc>;
+               interrupts = <24 0 2>, <25 1 3>;
+               interrupt-names = "tx_ts0", "tx_ts1";
+               dmas = <&main_pktdma 0xc200 15>, /* egress slice 0 */
+                      <&main_pktdma 0xc201 15>, /* egress slice 0 */
+                      <&main_pktdma 0xc202 15>, /* egress slice 0 */
+                      <&main_pktdma 0xc203 15>, /* egress slice 0 */
+                      <&main_pktdma 0xc204 15>, /* egress slice 1 */
+                      <&main_pktdma 0xc205 15>, /* egress slice 1 */
+                      <&main_pktdma 0xc206 15>, /* egress slice 1 */
+                      <&main_pktdma 0xc207 15>, /* egress slice 1 */
+                      <&main_pktdma 0x4200 15>, /* ingress slice 0 */
+                      <&main_pktdma 0x4201 15>; /* ingress slice 1 */
+               dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
+                           "tx1-0", "tx1-1", "tx1-2", "tx1-3",
+                           "rx0", "rx1";
+
+               ethernet-ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       icssg1_emac0: port@0 {
+                               reg = <0>;
+                               phy-handle = <&icssg1_phy1>;
+                               phy-mode = "rgmii-id";
+                               /* Filled in by bootloader */
+                               local-mac-address = [00 00 00 00 00 00];
+                       };
+                       icssg1_emac1: port@1 {
+                               reg = <1>;
+                               /* Filled in by bootloader */
+                               local-mac-address = [00 00 00 00 00 00];
+                               status = "disabled";
+                       };
+               };
+       };
 };
 
 &main_pmx0 {
                        AM64X_IOPAD(0x0030, PIN_OUTPUT_PULLUP, 7) /* (L18) OSPI0_CSN1.GPIO0_12 */
                >;
        };
+
+       icssg1_mdio1_pins_default: icssg1-mdio1-default-pins {
+               pinctrl-single,pins = <
+                       AM64X_IOPAD(0x015c, PIN_OUTPUT, 0) /* (Y6) PRG1_MDIO0_MDC */
+                       AM64X_IOPAD(0x0158, PIN_INPUT, 0) /* (AA6) PRG1_MDIO0_MDIO */
+               >;
+       };
+
+       icssg1_rgmii1_pins_default: icssg1-rgmii1-default-pins{
+               pinctrl-single,pins = <
+                       AM64X_IOPAD(0x00b8, PIN_INPUT, 2) /* (Y7) PRG1_PRU0_GPO0.PRG1_RGMII1_RD0 */
+                       AM64X_IOPAD(0x00bc, PIN_INPUT, 2) /* (U8) PRG1_PRU0_GPO1.PRG1_RGMII1_RD1 */
+                       AM64X_IOPAD(0x00c0, PIN_INPUT, 2) /* (W8) PRG1_PRU0_GPO2.PRG1_RGMII1_RD2 */
+                       AM64X_IOPAD(0x00c4, PIN_INPUT, 2) /* (V8) PRG1_PRU0_GPO3.PRG1_RGMII1_RD3 */
+                       AM64X_IOPAD(0x00d0, PIN_INPUT, 2) /* (AA7) PRG1_PRU0_GPO6.PRG1_RGMII1_RXC */
+                       AM64X_IOPAD(0x00c8, PIN_INPUT, 2) /* (Y8) PRG1_PRU0_GPO4.PRG1_RGMII1_RX_CTL */
+                       AM64X_IOPAD(0x00e4, PIN_INPUT, 2) /* (AA8) PRG1_PRU0_GPO11.PRG1_RGMII1_TD0 */
+                       AM64X_IOPAD(0x00e8, PIN_INPUT, 2) /* (U9) PRG1_PRU0_GPO12.PRG1_RGMII1_TD1 */
+                       AM64X_IOPAD(0x00ec, PIN_INPUT, 2) /* (W9) PRG1_PRU0_GPO13.PRG1_RGMII1_TD2 */
+                       AM64X_IOPAD(0x00f0, PIN_INPUT, 2) /* (AA9) PRG1_PRU0_GPO14.PRG1_RGMII1_TD3 */
+                       AM64X_IOPAD(0x00f8, PIN_INPUT, 2) /* (V9) PRG1_PRU0_GPO16.PRG1_RGMII1_TXC */
+                       AM64X_IOPAD(0x00f4, PIN_INPUT, 2) /* (Y9) PRG1_PRU0_GPO15.PRG1_RGMII1_TX_CTL */
+               >;
+       };
 };
 
 &main_uart0 {
        pinctrl-0 = <&main_mcan1_pins_default>;
        phys = <&transceiver2>;
 };
+
+&icssg1_mdio {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&icssg1_mdio1_pins_default>;
+
+       icssg1_phy1: ethernet-phy@f {
+               reg = <0xf>;
+               tx-internal-delay-ps = <250>;
+               rx-internal-delay-ps = <2000>;
+       };
+};