drm/amd/display: Update test link rate DPCD bit field to match spec

[Why]
An SCR was made to the DP2.0 spec that updated the bit field definition
for UHBR13.5 in the test link rate DPCD register.

[How]
Add new translation to match the SCR update. Keep old translation for
backwards compatibility.

Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: George Shen <george.shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
index 35ae245ef722b938b8f10b00c625b4e42a90ff07..eeeeeef4d717345e85296ffcc8fc28409909978b 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
@@ -142,7 +142,8 @@ enum dp_test_link_rate {
        DP_TEST_LINK_RATE_HBR3          = 0x1E,
        DP_TEST_LINK_RATE_UHBR10        = 0x01,
        DP_TEST_LINK_RATE_UHBR20        = 0x02,
-       DP_TEST_LINK_RATE_UHBR13_5      = 0x03,
+       DP_TEST_LINK_RATE_UHBR13_5_LEGACY       = 0x03, /* For backward compatibility*/
+       DP_TEST_LINK_RATE_UHBR13_5      = 0x04,
 };
 
 struct dc_link_settings {

diff --git a/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c b/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
index 21a39afd274bb64560a3b8ac2dd4c2cdc9a6ad95..a3ae757613384a1606dbbe6beb21ebb48c079f2d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
+++ b/drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
@@ -53,6 +53,7 @@ static enum dc_link_rate get_link_rate_from_test_link_rate(uint8_t test_rate)
                return LINK_RATE_UHBR10;
        case DP_TEST_LINK_RATE_UHBR20:
                return LINK_RATE_UHBR20;
+       case DP_TEST_LINK_RATE_UHBR13_5_LEGACY:
        case DP_TEST_LINK_RATE_UHBR13_5:
                return LINK_RATE_UHBR13_5;
        default:
@@ -119,6 +120,11 @@ static void dp_test_send_link_training(struct dc_link *link)
                        1);
        link_settings.link_rate = get_link_rate_from_test_link_rate(test_rate);
 
+       if (link_settings.link_rate == LINK_RATE_UNKNOWN) {
+               DC_LOG_ERROR("%s: Invalid test link rate.", __func__);
+               ASSERT(0);
+       }
+
        /* Set preferred link settings */
        link->verified_link_cap.lane_count = link_settings.lane_count;
        link->verified_link_cap.link_rate = link_settings.link_rate;
@@ -457,7 +463,7 @@ static void set_crtc_test_pattern(struct dc_link *link,
                        controller_color_space = pipe_ctx->stream_res.test_pattern_params.color_space;
 
                        if (controller_color_space == CONTROLLER_DP_COLOR_SPACE_UDEFINED) {
-                               DC_LOG_WARNING("%s: Color space must be defined for test pattern", __func__);
+                               DC_LOG_ERROR("%s: Color space must be defined for test pattern", __func__);
                                ASSERT(0);
                        }