Merge branch 'for-next/errata' into for-next/core
authorWill Deacon <will@kernel.org>
Fri, 10 May 2024 13:34:37 +0000 (14:34 +0100)
committerWill Deacon <will@kernel.org>
Fri, 10 May 2024 13:34:37 +0000 (14:34 +0100)
* for-next/errata:
  arm64: errata: Add workaround for Arm errata 3194386 and 3312417
  arm64: cputype: Add Neoverse-V3 definitions
  arm64: cputype: Add Cortex-X4 definitions
  arm64: barrier: Restore spec_bar() macro

1  2 
arch/arm64/Kconfig
arch/arm64/include/asm/cputype.h

Simple merge
index 936389e9aecbc717828cf9a595145f4bd540b98b,67a86926ae16f63f599b499cd63cb623dfc076cc..7b32b99023a21d3abc9f86e7b6acd7dc861793b2
@@@ -86,7 -86,8 +86,9 @@@
  #define ARM_CPU_PART_CORTEX_X2                0xD48
  #define ARM_CPU_PART_NEOVERSE_N2      0xD49
  #define ARM_CPU_PART_CORTEX_A78C      0xD4B
 +#define ARM_CPU_PART_NEOVERSE_V2      0xD4F
+ #define ARM_CPU_PART_CORTEX_X4                0xD82
+ #define ARM_CPU_PART_NEOVERSE_V3      0xD84
  
  #define APM_CPU_PART_XGENE            0x000
  #define APM_CPU_VAR_POTENZA           0x00
  #define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2)
  #define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2)
  #define MIDR_CORTEX_A78C      MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78C)
 +#define MIDR_NEOVERSE_V2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V2)
+ #define MIDR_CORTEX_X4 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X4)
+ #define MIDR_NEOVERSE_V3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V3)
  #define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
  #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
  #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)