drm/amd/pm: disable/enable deep sleep features on UMD pstate enter/exit

Add deep sleep disablement/enablement on UMD pstate entering/exiting.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
index 7cc707ec21c33b3eedae608784431762e9ade003..4c5c041af4ee574f38b81fd292128101fc379d7b 100644 (file)
--- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
@@ -597,6 +597,7 @@ struct pptable_funcs {
        ssize_t (*get_gpu_metrics)(struct smu_context *smu, void **table);
        int (*enable_mgpu_fan_boost)(struct smu_context *smu);
        int (*gfx_ulv_control)(struct smu_context *smu, bool enablement);
+       int (*deep_sleep_control)(struct smu_context *smu, bool enablement);
 };
 
 typedef enum {

diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 221b5c923ce155ae952220c1e271fee2f7d4e9b3..8eb5b92903cd0f16694e6d9362cc131c50cbae72 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -1441,6 +1441,7 @@ static int smu_enable_umd_pstate(void *handle,
                                                               AMD_IP_BLOCK_TYPE_GFX,
                                                               AMD_CG_STATE_UNGATE);
                        smu_gfx_ulv_control(smu, false);
+                       smu_deep_sleep_control(smu, false);
                }
        } else {
                /* exit umd pstate, restore level, enable gfx cg*/
@@ -1448,6 +1449,7 @@ static int smu_enable_umd_pstate(void *handle,
                        if (*level == AMD_DPM_FORCED_LEVEL_PROFILE_EXIT)
                                *level = smu_dpm_ctx->saved_dpm_level;
                        smu_dpm_ctx->enable_umd_pstate = false;
+                       smu_deep_sleep_control(smu, true);
                        smu_gfx_ulv_control(smu, true);
                        amdgpu_device_ip_set_clockgating_state(smu->adev,
                                                               AMD_IP_BLOCK_TYPE_GFX,

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h b/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h
index 2fe29c6a00ceb222cd48ba369ff1f39cf95656b6..c88f8fab1bae9f2e12432c09b304d5d1c6bf37a3 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_internal.h
@@ -93,6 +93,7 @@
 #define smu_get_pp_feature_mask(smu, buf)                              smu_ppt_funcs(get_pp_feature_mask, 0, smu, buf)
 #define smu_set_pp_feature_mask(smu, new_mask)                         smu_ppt_funcs(set_pp_feature_mask, 0, smu, new_mask)
 #define smu_gfx_ulv_control(smu, enablement)                           smu_ppt_funcs(gfx_ulv_control, 0, smu, enablement)
+#define smu_deep_sleep_control(smu, enablement)                                smu_ppt_funcs(deep_sleep_control, 0, smu, enablement)
 
 #endif
 #endif