arm64: dts: mediatek: mt8186: Add jpgenc node

Add JPEG encoder node.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Reviewed-by: Max Staudt <mstaudt@chromium.org>
Tested-by: Max Staudt <mstaudt@chromium.org>
Reviewed-by: Ricardo Ribalda <ribalda@chromium.org>
[eugen.hristev@collabora.com: minor cleanup]
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240127084258.68302-2-eugen.hristev@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index e8dfb9c55e5f65ec045e9c8188c06815861bfa7c..adaf5e57fac5033e6510dda5b61dcae43a9b32ba 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -2018,6 +2018,19 @@
                        mediatek,scp = <&scp>;
                };
 
+               jpgenc: jpeg-encoder@17030000 {
+                       compatible = "mediatek,mt8186-jpgenc", "mediatek,mtk-jpgenc";
+                       reg = <0 0x17030000 0 0x10000>;
+                       interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH 0>;
+                       clocks = <&vencsys CLK_VENC_CKE2_JPGENC>;
+                       clock-names = "jpgenc";
+                       iommus = <&iommu_mm IOMMU_PORT_L7_JPGENC_Y_RDMA>,
+                                <&iommu_mm IOMMU_PORT_L7_JPGENC_C_RDMA>,
+                                <&iommu_mm IOMMU_PORT_L7_JPGENC_Q_TABLE>,
+                                <&iommu_mm IOMMU_PORT_L7_JPGENC_BSDMA>;
+                       power-domains = <&spm MT8186_POWER_DOMAIN_VENC>;
+               };
+
                camsys: clock-controller@1a000000 {
                        compatible = "mediatek,mt8186-camsys";
                        reg = <0 0x1a000000 0 0x1000>;