#define TCG_TARGET_NB_REGS 64
-#include "tcg-target-has.h"
-
#define TCG_TARGET_DEFAULT_MO (0)
#endif /* AARCH64_TCG_TARGET_H */
#define TCG_TARGET_NB_REGS 32
-#include "tcg-target-has.h"
-
#define TCG_TARGET_DEFAULT_MO (0)
#endif
TCG_REG_CALL_STACK = TCG_REG_ESP
} TCGReg;
-#include "tcg-target-has.h"
-
/* This defines the natural memory order supported by this
* architecture before guarantees made by various barrier
* instructions.
TCG_VEC_TMP0 = TCG_REG_V23,
} TCGReg;
-#include "tcg-target-has.h"
-
#define TCG_TARGET_DEFAULT_MO (0)
#endif /* LOONGARCH_TCG_TARGET_H */
TCG_AREG0 = TCG_REG_S8,
} TCGReg;
-#include "tcg-target-has.h"
-
#define TCG_TARGET_DEFAULT_MO 0
#endif
TCG_AREG0 = TCG_REG_R27
} TCGReg;
-#include "tcg-target-has.h"
-
#define TCG_TARGET_DEFAULT_MO (0)
#endif
TCG_REG_TMP2 = TCG_REG_T4,
} TCGReg;
-#include "tcg-target-has.h"
-
#define TCG_TARGET_DEFAULT_MO (0)
#endif
#define TCG_TARGET_NB_REGS 64
-#include "tcg-target-has.h"
-
#define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
#endif
#define TCG_AREG0 TCG_REG_I0
-#include "tcg-target-has.h"
-
#define TCG_TARGET_DEFAULT_MO (0)
#endif
#ifndef TCG_HAS_H
#define TCG_HAS_H
+#include "tcg-target-has.h"
+
#if TCG_TARGET_REG_BITS == 32
/* Turn some undef macros into false macros. */
#define TCG_TARGET_HAS_extr_i64_i32 0
#define TCG_TARGET_INSN_UNIT_SIZE 4
#define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1)
-#include "tcg-target-has.h"
-
/* Number of registers available. */
#define TCG_TARGET_NB_REGS 16