{
int i;
- qemu_put_be32(f, 2); /* PCI device version */
+ qemu_put_be32(f, s->version_id); /* PCI device version */
qemu_put_buffer(f, s->config, 256);
for (i = 0; i < 4; i++)
qemu_put_be32(f, s->irq_state[i]);
pci_dev->config_write = config_write;
bus->devices[devfn] = pci_dev;
pci_dev->irq = qemu_allocate_irqs(pci_set_irq, pci_dev, 4);
+ pci_dev->version_id = 2; /* Current pci device vmstate version */
return pci_dev;
}
unsigned *msix_entry_used;
/* Region including the MSI-X table */
uint32_t msix_bar_size;
+ /* Version id needed for VMState */
+ int32_t version_id;
};
PCIDevice *pci_register_device(PCIBus *bus, const char *name,