clocksource/drivers/mips-gic-timer: Add fastpath for local timer updates

Always accessing the compare register via the CM redirect region is
(relatively) slow. If the timer being updated is the current CPUs
then this can be shortcutted by writing to the CM VP local region.

Signed-off-by: Matt Redfearn <matt.redfearn@mips.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>

diff --git a/drivers/clocksource/mips-gic-timer.c b/drivers/clocksource/mips-gic-timer.c
index 775dea04460de8ccae8652e49c50019a4ee15f87..a04808a21d4ec9eef5d3c6d5e7ed140945d1001b 100644 (file)
--- a/drivers/clocksource/mips-gic-timer.c
+++ b/drivers/clocksource/mips-gic-timer.c
@@ -39,13 +39,18 @@ static u64 notrace gic_read_count(void)
 
 static int gic_next_event(unsigned long delta, struct clock_event_device *evt)
 {
+       int cpu = cpumask_first(evt->cpumask);
        u64 cnt;
        int res;
 
        cnt = gic_read_count();
        cnt += (u64)delta;
-       write_gic_vl_other(mips_cm_vp_id(cpumask_first(evt->cpumask)));
-       write_gic_vo_compare(cnt);
+       if (cpu == raw_smp_processor_id()) {
+               write_gic_vl_compare(cnt);
+       } else {
+               write_gic_vl_other(mips_cm_vp_id(cpu));
+               write_gic_vo_compare(cnt);
+       }
        res = ((int)(gic_read_count() - cnt) >= 0) ? -ETIME : 0;
        return res;
 }