staging: mt7621-dts: set up only two pcie phys
authorSergio Paracuellos <sergio.paracuellos@gmail.com>
Fri, 20 Mar 2020 11:01:20 +0000 (12:01 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 20 Mar 2020 14:10:50 +0000 (15:10 +0100)
This soc has only two real pcie phys one of them
having a different register to enable and disable it.
Change this to have only two dt nodes for the phys and
use 'phy-cells' properly to say if the phy has dual ports.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20200320110123.9907-3-sergio.paracuellos@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/mt7621-dts/mt7621.dtsi

index 488474153535df60720fc77ddbfdfe4ccdb47b83..10fb497cf81adcc8d5eca6b6ca3d8f665016466b 100644 (file)
                reset-names = "pcie0", "pcie1", "pcie2";
                clocks = <&clkctrl 24 &clkctrl 25 &clkctrl 26>;
                clock-names = "pcie0", "pcie1", "pcie2";
-               phys = <&pcie0_phy 0>, <&pcie0_phy 1>, <&pcie1_phy 0>;
-               phy-names = "pcie-phy0", "pcie-phy1", "pcie-phy2";
+               phys = <&pcie0_phy 1>, <&pcie2_phy 0>;
+               phy-names = "pcie-phy0", "pcie-phy2";
 
                reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>,
                                <&gpio 8 GPIO_ACTIVE_LOW>,
                #phy-cells = <1>;
        };
 
-       pcie1_phy: pcie-phy@1e14a000 {
+       pcie2_phy: pcie-phy@1e14a000 {
                compatible = "mediatek,mt7621-pci-phy";
                reg = <0x1e14a000 0x0700>;
                #phy-cells = <1>;