arm64: dts: qcom: sc7180: Add DisplayPort node

Add DP device node on sc7180.

Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1622758940-13485-1-git-send-email-khsieh@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
index 77ae7561d436e335fe989874e3fbd344e3b70c00..43126c56e320214c34018218ea78476f59247c98 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
@@ -778,6 +778,15 @@ hp_i2c: &i2c9 {
        status = "okay";
 };
 
+&mdss_dp {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&dp_hot_plug_det>;
+       data-lanes = <0 1>;
+       vdda-1p2-supply = <&vdda_usb_ss_dp_1p2>;
+       vdda-0p9-supply = <&vdda_usb_ss_dp_core>;
+};
+
 &pm6150_adc {
        charger-thermistor@4f {
                reg = <ADC5_AMUX_THM3_100K_PU>;

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index a5d58eb928960b496f9c27b3a92690de3fcd156d..0d33c671751b77f220e96811b362f1aa5718fbeb 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -2928,6 +2928,13 @@
                                                        remote-endpoint = <&dsi0_in>;
                                                };
                                        };
+
+                                       port@2 {
+                                               reg = <2>;
+                                               dpu_intf0_out: endpoint {
+                                                       remote-endpoint = <&dp_in>;
+                                               };
+                                       };
                                };
 
                                mdp_opp_table: mdp-opp-table {
@@ -3044,6 +3051,75 @@
 
                                status = "disabled";
                        };
+
+                       mdss_dp: displayport-controller@ae90000 {
+                               compatible = "qcom,sc7180-dp";
+                               status = "disabled";
+
+                               reg = <0 0x0ae90000 0 0x1400>;
+
+                               interrupt-parent = <&mdss>;
+                               interrupts = <12>;
+
+                               clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
+                                        <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
+                                        <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
+                                        <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
+                                        <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
+                               clock-names = "core_iface", "core_aux", "ctrl_link",
+                                             "ctrl_link_iface", "stream_pixel";
+                               #clock-cells = <1>;
+                               assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
+                                                 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
+                               assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
+                               phys = <&dp_phy>;
+                               phy-names = "dp";
+
+                               operating-points-v2 = <&dp_opp_table>;
+                               power-domains = <&rpmhpd SC7180_CX>;
+
+                               #sound-dai-cells = <0>;
+
+                               ports {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       port@0 {
+                                               reg = <0>;
+                                               dp_in: endpoint {
+                                                       remote-endpoint = <&dpu_intf0_out>;
+                                               };
+                                       };
+
+                                       port@1 {
+                                               reg = <1>;
+                                               dp_out: endpoint { };
+                                       };
+                               };
+
+                               dp_opp_table: opp-table {
+                                       compatible = "operating-points-v2";
+
+                                       opp-160000000 {
+                                               opp-hz = /bits/ 64 <160000000>;
+                                               required-opps = <&rpmhpd_opp_low_svs>;
+                                       };
+
+                                       opp-270000000 {
+                                               opp-hz = /bits/ 64 <270000000>;
+                                               required-opps = <&rpmhpd_opp_svs>;
+                                       };
+
+                                       opp-540000000 {
+                                               opp-hz = /bits/ 64 <540000000>;
+                                               required-opps = <&rpmhpd_opp_svs_l1>;
+                                       };
+
+                                       opp-810000000 {
+                                               opp-hz = /bits/ 64 <810000000>;
+                                               required-opps = <&rpmhpd_opp_nom>;
+                                       };
+                               };
+                       };
                };
 
                dispcc: clock-controller@af00000 {