drm/i915: Decouple intel_dp_{min,output}_bpp() from crtc_state

Pass the output_format directly to intel_dp_{min,output}_bpp()
rather than passing in the crtc_state and digging out the
output_format inside the functions. This will allow us to reuse
the functions for mode validation purposes.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200917214335.3569-2-ville.syrjala@linux.intel.com
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index ad9b8b16fadb1f148d005fc5e65b73056fe4e11b..aa4801a8123d66b564e96338f321c6317bf7b3c1 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2111,14 +2111,14 @@ intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
        }
 }
 
-static int intel_dp_output_bpp(const struct intel_crtc_state *crtc_state, int bpp)
+static int intel_dp_output_bpp(enum intel_output_format output_format, int bpp)
 {
        /*
         * bpp value was assumed to RGB format. And YCbCr 4:2:0 output
         * format of the number of bytes per pixel will be half the number
         * of bytes of RGB pixel.
         */
-       if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420)
+       if (output_format == INTEL_OUTPUT_FORMAT_YCBCR420)
                bpp /= 2;
 
        return bpp;
@@ -2135,7 +2135,7 @@ intel_dp_compute_link_config_wide(struct intel_dp *intel_dp,
        int mode_rate, link_clock, link_avail;
 
        for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
-               int output_bpp = intel_dp_output_bpp(pipe_config, bpp);
+               int output_bpp = intel_dp_output_bpp(pipe_config->output_format, bpp);
 
                mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock,
                                                   output_bpp);
@@ -2346,9 +2346,9 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
        return 0;
 }
 
-int intel_dp_min_bpp(const struct intel_crtc_state *crtc_state)
+int intel_dp_min_bpp(enum intel_output_format output_format)
 {
-       if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_RGB)
+       if (output_format == INTEL_OUTPUT_FORMAT_RGB)
                return 6 * 3;
        else
                return 8 * 3;
@@ -2379,7 +2379,7 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
        limits.min_lane_count = 1;
        limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
 
-       limits.min_bpp = intel_dp_min_bpp(pipe_config);
+       limits.min_bpp = intel_dp_min_bpp(pipe_config->output_format);
        limits.max_bpp = intel_dp_max_bpp(intel_dp, pipe_config);
 
        if (intel_dp_is_edp(intel_dp)) {
@@ -2765,7 +2765,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
        if (pipe_config->dsc.compression_enable)
                output_bpp = pipe_config->dsc.compressed_bpp;
        else
-               output_bpp = intel_dp_output_bpp(pipe_config, pipe_config->pipe_bpp);
+               output_bpp = intel_dp_output_bpp(pipe_config->output_format,
+                                                pipe_config->pipe_bpp);
 
        intel_link_compute_m_n(output_bpp,
                               pipe_config->lane_count,

diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 08a1c0aa8b94b78a4ee9d7e734d5e81ba015e377..a9580d1df35b5af61aaa45289ba3ee5fb9f33fbf 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -10,6 +10,7 @@
 
 #include "i915_reg.h"
 
+enum intel_output_format;
 enum pipe;
 enum port;
 struct drm_connector_state;
@@ -35,7 +36,7 @@ void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
                                       struct link_config_limits *limits);
 bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
                                  const struct drm_connector_state *conn_state);
-int intel_dp_min_bpp(const struct intel_crtc_state *crtc_state);
+int intel_dp_min_bpp(enum intel_output_format output_format);
 bool intel_dp_port_enabled(struct drm_i915_private *dev_priv,
                           i915_reg_t dp_reg, enum port port,
                           enum pipe *pipe);

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 64d885539e94ad4d11dc70df56cb1475d3998ae0..6a874b779b1fc96fad5a9624c1a82c384da6316e 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -130,7 +130,7 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
        limits.min_lane_count =
        limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
 
-       limits.min_bpp = intel_dp_min_bpp(pipe_config);
+       limits.min_bpp = intel_dp_min_bpp(pipe_config->output_format);
        /*
         * FIXME: If all the streams can't fit into the link with
         * their current pipe_bpp we should reduce pipe_bpp across