ARM: dts: Modernize the Vexpress PL111 integration

The Versatile Express was submitted with the actual display
bridges unconnected (but defined in the device tree) and
mock "panels" encoded in the device tree node of the PL111
controller.

This doesn't even remotely describe the actual Versatile
Express hardware. Exploit the SiI9022 bridge by connecting
the PL111 pads to it, making it use EDID or fallback values
to drive the monitor.

The  also has to use the reserved memory through the
CMA pool rather than by open coding a memory region and
remapping it explicitly in the driver. To achieve this,
a reserved-memory node must exist in the root of the
device tree, so we need to pull that out of the
motherboard .dtsi include files, and push it into each
top-level device tree instead.

We do the same manouver for all the Versatile Express
boards, taking into account the different location of the
video RAM depending on which chip select is used on
each platform.

This plays nicely with the new PL111 DRM driver and
follows the standard ways of assigning bridges and
memory pools for graphics.

Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Mali DP Maintainers <malidp@foss.arm.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Tested-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
index 4488c8fe213aabb750e9e185e9b87fa16b01d351..a9569d15de41059706fae9a8b86111ebba50b87e 100644 (file)
--- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -43,11 +43,6 @@
                                bank-width = <4>;
                        };
 
-                       v2m_video_ram: vram@2,00000000 {
-                               compatible = "arm,vexpress-vram";
-                               reg = <2 0x00000000 0x00800000>;
-                       };
-
                        ethernet@2,02000000 {
                                compatible = "smsc,lan9118", "smsc,lan9115";
                                reg = <2 0x02000000 0x10000>;
@@ -223,13 +218,24 @@
                                v2m_i2c_dvi: i2c@160000 {
                                        compatible = "arm,versatile-i2c";
                                        reg = <0x160000 0x1000>;
-
                                        #address-cells = <1>;
                                        #size-cells = <0>;
 
                                        dvi-transmitter@39 {
                                                compatible = "sil,sii9022-tpi", "sil,sii9022";
                                                reg = <0x39>;
+
+                                               ports {
+                                                       #address-cells = <1>;
+                                                       #size-cells = <0>;
+
+                                                       port@0 {
+                                                               reg = <0>;
+                                                               dvi_bridge_in: endpoint {
+                                                                       remote-endpoint = <&clcd_pads>;
+                                                               };
+                                                       };
+                                               };
                                        };
 
                                        dvi-transmitter@60 {
@@ -260,37 +266,16 @@
                                        interrupts = <14>;
                                        clocks = <&v2m_oscclk1>, <&smbclk>;
                                        clock-names = "clcdclk", "apb_pclk";
-                                       memory-region = <&v2m_video_ram>;
-                                       max-memory-bandwidth = <50350000>; /* 16bpp @ 25.175MHz */
+                                       /* 800x600 16bpp @36MHz works fine */
+                                       max-memory-bandwidth = <54000000>;
+                                       memory-region = <&vram>;
 
                                        port {
-                                               v2m_clcd_pads: endpoint {
-                                                       remote-endpoint = <&v2m_clcd_panel>;
+                                               clcd_pads: endpoint {
+                                                       remote-endpoint = <&dvi_bridge_in>;
                                                        arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
                                                };
                                        };
-
-                                       panel {
-                                               compatible = "panel-dpi";
-
-                                               port {
-                                                       v2m_clcd_panel: endpoint {
-                                                               remote-endpoint = <&v2m_clcd_pads>;
-                                                       };
-                                               };
-
-                                               panel-timing {
-                                                       clock-frequency = <25175000>;
-                                                       hactive = <640>;
-                                                       hback-porch = <40>;
-                                                       hfront-porch = <24>;
-                                                       hsync-len = <96>;
-                                                       vactive = <480>;
-                                                       vback-porch = <32>;
-                                                       vfront-porch = <11>;
-                                                       vsync-len = <2>;
-                                               };
-                                       };
                                };
                        };
 

diff --git a/arch/arm/boot/dts/vexpress-v2m.dtsi b/arch/arm/boot/dts/vexpress-v2m.dtsi
index 4db42f6326a3175072f7fe617064ab983fbcf5e6..fd42e1194179619e4549d206c19a0bc4c766e976 100644 (file)
--- a/arch/arm/boot/dts/vexpress-v2m.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m.dtsi
@@ -43,11 +43,6 @@
                                bank-width = <4>;
                        };
 
-                       v2m_video_ram: vram@3,00000000 {
-                               compatible = "arm,vexpress-vram";
-                               reg = <3 0x00000000 0x00800000>;
-                       };
-
                        ethernet@3,02000000 {
                                compatible = "smsc,lan9118", "smsc,lan9115";
                                reg = <3 0x02000000 0x10000>;
@@ -223,13 +218,37 @@
                                v2m_i2c_dvi: i2c@16000 {
                                        compatible = "arm,versatile-i2c";
                                        reg = <0x16000 0x1000>;
-
                                        #address-cells = <1>;
                                        #size-cells = <0>;
 
                                        dvi-transmitter@39 {
                                                compatible = "sil,sii9022-tpi", "sil,sii9022";
                                                reg = <0x39>;
+
+                                               ports {
+                                                       #address-cells = <1>;
+                                                       #size-cells = <0>;
+
+                                                       /*
+                                                        * Both the core tile and the motherboard routes their output
+                                                        * pads to this transmitter. The motherboard system controller
+                                                        * can select one of them as input using a mux register in
+                                                        * "arm,vexpress-muxfpga". The Vexpress with the CA9 core tile is
+                                                        * the only platform with this specific set-up.
+                                                        */
+                                                       port@0 {
+                                                               reg = <0>;
+                                                               dvi_bridge_in_ct: endpoint {
+                                                                       remote-endpoint = <&clcd_pads_ct>;
+                                                               };
+                                                       };
+                                                       port@1 {
+                                                               reg = <1>;
+                                                               dvi_bridge_in_mb: endpoint {
+                                                                       remote-endpoint = <&clcd_pads_mb>;
+                                                               };
+                                                       };
+                                               };
                                        };
 
                                        dvi-transmitter@60 {
@@ -253,6 +272,7 @@
                                        reg-shift = <2>;
                                };
 
+
                                clcd@1f000 {
                                        compatible = "arm,pl111", "arm,primecell";
                                        reg = <0x1f000 0x1000>;
@@ -260,37 +280,16 @@
                                        interrupts = <14>;
                                        clocks = <&v2m_oscclk1>, <&smbclk>;
                                        clock-names = "clcdclk", "apb_pclk";
-                                       memory-region = <&v2m_video_ram>;
-                                       max-memory-bandwidth = <50350000>; /* 16bpp @ 25.175MHz */
+                                       /* 800x600 16bpp @36MHz works fine */
+                                       max-memory-bandwidth = <54000000>;
+                                       memory-region = <&vram>;
 
                                        port {
-                                               v2m_clcd_pads: endpoint {
-                                                       remote-endpoint = <&v2m_clcd_panel>;
+                                               clcd_pads_mb: endpoint {
+                                                       remote-endpoint = <&dvi_bridge_in_mb>;
                                                        arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
                                                };
                                        };
-
-                                       panel {
-                                               compatible = "panel-dpi";
-
-                                               port {
-                                                       v2m_clcd_panel: endpoint {
-                                                               remote-endpoint = <&v2m_clcd_pads>;
-                                                       };
-                                               };
-
-                                               panel-timing {
-                                                       clock-frequency = <25175000>;
-                                                       hactive = <640>;
-                                                       hback-porch = <40>;
-                                                       hfront-porch = <24>;
-                                                       hsync-len = <96>;
-                                                       vactive = <480>;
-                                                       vback-porch = <32>;
-                                                       vfront-porch = <11>;
-                                                       vsync-len = <2>;
-                                               };
-                                       };
                                };
                        };
 

diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
index 3971427a105b5447e113427d565bd980096a4502..0dc4277d5f8bbd53fc12be26e45237fe8b362c5e 100644 (file)
--- a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
@@ -53,6 +53,20 @@
                reg = <0 0x80000000 0 0x40000000>;
        };
 
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               /* Chipselect 2 is physically at 0x18000000 */
+               vram: vram@18000000 {
+                       /* 8 MB of designated video RAM */
+                       compatible = "shared-dma-pool";
+                       reg = <0 0x18000000 0 0x00800000>;
+                       no-map;
+               };
+       };
+
        hdlcd@2b000000 {
                compatible = "arm,hdlcd";
                reg = <0 0x2b000000 0 0x1000>;

diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
index ac6b90e9d806042f153d6cc4260b1dba765904f2..a5136b1adaa2f91a1213b5cb270cfdb678ef3940 100644 (file)
--- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
@@ -104,6 +104,20 @@
                reg = <0 0x80000000 0 0x40000000>;
        };
 
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               /* Chipselect 2 is physically at 0x18000000 */
+               vram: vram@18000000 {
+                       /* 8 MB of designated video RAM */
+                       compatible = "shared-dma-pool";
+                       reg = <0 0x18000000 0 0x00800000>;
+                       no-map;
+               };
+       };
+
        wdt@2a490000 {
                compatible = "arm,sp805", "arm,primecell";
                reg = <0 0x2a490000 0 0x1000>;

diff --git a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
index e5b4a7570a010e0562eac1b3a6e05627c2c7b0e3..d5b47d526f9ef437ec4d3a9dcec27ca29a64367a 100644 (file)
--- a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
@@ -55,6 +55,20 @@
                reg = <0x80000000 0x40000000>;
        };
 
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               /* Chipselect 2 is physically at 0x18000000 */
+               vram: vram@18000000 {
+                       /* 8 MB of designated video RAM */
+                       compatible = "shared-dma-pool";
+                       reg = <0x18000000 0x00800000>;
+                       no-map;
+               };
+       };
+
        hdlcd@2a110000 {
                compatible = "arm,hdlcd";
                reg = <0x2a110000 0x1000>;

diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
index fc43873cbdff5dbf7b7f14d1e699da5c8228a682..d796efaadbe3a8d56980b95edc815f83fc428213 100644 (file)
--- a/arch/arm/boot/dts/vexpress-v2p-ca9.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
@@ -69,6 +69,20 @@
                reg = <0x60000000 0x40000000>;
        };
 
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               /* Chipselect 3 is physically at 0x4c000000 */
+               vram: vram@4c000000 {
+                       /* 8 MB of designated video RAM */
+                       compatible = "shared-dma-pool";
+                       reg = <0x4c000000 0x00800000>;
+                       no-map;
+               };
+       };
+
        clcd@10020000 {
                compatible = "arm,pl111", "arm,primecell";
                reg = <0x10020000 0x1000>;
@@ -76,36 +90,15 @@
                interrupts = <0 44 4>;
                clocks = <&oscclk1>, <&oscclk2>;
                clock-names = "clcdclk", "apb_pclk";
-               max-memory-bandwidth = <130000000>; /* 16bpp @ 63.5MHz */
+               /* 1024x768 16bpp @65MHz */
+               max-memory-bandwidth = <95000000>;
 
                port {
-                       clcd_pads: endpoint {
-                               remote-endpoint = <&clcd_panel>;
+                       clcd_pads_ct: endpoint {
+                               remote-endpoint = <&dvi_bridge_in_ct>;
                                arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
                        };
                };
-
-               panel {
-                       compatible = "panel-dpi";
-
-                       port {
-                               clcd_panel: endpoint {
-                                       remote-endpoint = <&clcd_pads>;
-                               };
-                       };
-
-                       panel-timing {
-                               clock-frequency = <63500127>;
-                               hactive = <1024>;
-                               hback-porch = <152>;
-                               hfront-porch = <48>;
-                               hsync-len = <104>;
-                               vactive = <768>;
-                               vback-porch = <23>;
-                               vfront-porch = <3>;
-                               vsync-len = <4>;
-                       };
-               };
        };
 
        memory-controller@100e0000 {

diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
index 602f63f72c37e66a41108768fbbeadfc6fda4596..fe4fda473c0abacecc45a83bd912bdcb32463f50 100644 (file)
--- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
@@ -78,6 +78,20 @@
                      <0x00000008 0x80000000 0 0x80000000>;
        };
 
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               /* Chipselect 2,00000000 is physically at 0x18000000 */
+               vram: vram@18000000 {
+                       /* 8 MB of designated video RAM */
+                       compatible = "shared-dma-pool";
+                       reg = <0x00000000 0x18000000 0 0x00800000>;
+                       no-map;
+               };
+       };
+
        gic: interrupt-controller@2c001000 {
                compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
                #interrupt-cells = <3>;
@@ -107,6 +121,15 @@
                             <0 63 4>;
        };
 
+       panel {
+               compatible = "arm,rtsm-display";
+               port {
+                       panel_in: endpoint {
+                               remote-endpoint = <&clcd_pads>;
+                       };
+               };
+       };
+
        smb@8000000 {
                compatible = "simple-bus";
 

diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
index d2dbc3f39263f96d9f8dd065fb34de6d045ea98e..b25f3cbd3da8c41d5559c099aea34fc45ee6f0b6 100644 (file)
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
@@ -24,11 +24,6 @@
                                bank-width = <4>;
                        };
 
-                       v2m_video_ram: vram@2,00000000 {
-                               compatible = "arm,vexpress-vram";
-                               reg = <2 0x00000000 0x00800000>;
-                       };
-
                        ethernet@2,02000000 {
                                compatible = "smsc,lan91c111";
                                reg = <2 0x02000000 0x10000>;
@@ -187,38 +182,16 @@
                                        interrupts = <14>;
                                        clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>;
                                        clock-names = "clcdclk", "apb_pclk";
-                                       arm,pl11x,framebuffer = <0x18000000 0x00180000>;
-                                       memory-region = <&v2m_video_ram>;
-                                       max-memory-bandwidth = <130000000>; /* 16bpp @ 63.5MHz */
+                                       /* 800x600 16bpp @36MHz works fine */
+                                       max-memory-bandwidth = <54000000>;
+                                       memory-region = <&vram>;
 
                                        port {
-                                               v2m_clcd_pads: endpoint {
-                                                       remote-endpoint = <&v2m_clcd_panel>;
+                                               clcd_pads: endpoint {
+                                                       remote-endpoint = <&panel_in>;
                                                        arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
                                                };
                                        };
-
-                                       panel {
-                                               compatible = "panel-dpi";
-
-                                               port {
-                                                       v2m_clcd_panel: endpoint {
-                                                               remote-endpoint = <&v2m_clcd_pads>;
-                                                       };
-                                               };
-
-                                               panel-timing {
-                                                       clock-frequency = <63500127>;
-                                                       hactive = <1024>;
-                                                       hback-porch = <152>;
-                                                       hfront-porch = <48>;
-                                                       hsync-len = <104>;
-                                                       vactive = <768>;
-                                                       vback-porch = <23>;
-                                                       vfront-porch = <3>;
-                                                       vsync-len = <4>;
-                                               };
-                                       };
                                };
 
                                virtio-block@130000 {

diff --git a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
index 38880380e0facf2067b9daf5587c21366edcdc45..8981c3d2ff180c2240af64c8ec4fde17dfb52421 100644 (file)
--- a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
+++ b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
@@ -65,6 +65,20 @@
                reg = <0 0x80000000 0 0x80000000>; /* 2GB @ 2GB */
        };
 
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               /* Chipselect 2 is physically at 0x18000000 */
+               vram: vram@18000000 {
+                       /* 8 MB of designated video RAM */
+                       compatible = "shared-dma-pool";
+                       reg = <0 0x18000000 0 0x00800000>;
+                       no-map;
+               };
+       };
+
        gic: interrupt-controller@2c001000 {
                compatible = "arm,gic-400";
                #interrupt-cells = <3>;