arm64: dts: renesas: Handle ADG bit for sound clk_i
authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tue, 22 Aug 2023 05:57:55 +0000 (05:57 +0000)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 11 Sep 2023 11:34:03 +0000 (13:34 +0200)
Renesas Sound has been using CPG_AUDIO_CLK_I on CPG_CORE for clock,
but this was wrong.  Instead, it needs to use CPG_MOD, so clk_i can
handle the "ADG" bit in SMSTPCR9.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Vincenzo De Michele <vincenzo.michele@davinci.de> [r8a77965]
Tested-by: Patrick Keil <patrick.keil@conti-engineering.com> [r8a77965]
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/87y1i3sjoc.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87wmxnsjo7.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87v8d7sjo2.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87ttsrsjnx.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87sf8bsjns.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87r0nvsjnn.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87pm3fsjni.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87o7izsjnd.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87msyjsjn9.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87lee3sjn4.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87jztnsjmy.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87il97sjmu.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87h6orsjmp.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87fs4bsjml.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87edjvsjmg.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
14 files changed:
arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
arch/arm64/boot/dts/renesas/hihope-rev4.dtsi
arch/arm64/boot/dts/renesas/r8a774a1.dtsi
arch/arm64/boot/dts/renesas/r8a774b1.dtsi
arch/arm64/boot/dts/renesas/r8a774c0.dtsi
arch/arm64/boot/dts/renesas/r8a774e1.dtsi
arch/arm64/boot/dts/renesas/r8a77951.dtsi
arch/arm64/boot/dts/renesas/r8a77960.dtsi
arch/arm64/boot/dts/renesas/r8a77961.dtsi
arch/arm64/boot/dts/renesas/r8a77965.dtsi
arch/arm64/boot/dts/renesas/r8a77990.dtsi
arch/arm64/boot/dts/renesas/r8a77995.dtsi
arch/arm64/boot/dts/renesas/salvator-common.dtsi
arch/arm64/boot/dts/renesas/ulcb.dtsi

index 2e9927b97732dc36c9d24c58ec5ecb726aa503f4..5a14f116f7a1eedffbf6004e368a43241417848a 100644 (file)
                 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
                 <&versaclock6_bb 4>, <&audio_clk_b>,
                 <&audio_clk_c>,
-                <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
+                <&cpg CPG_MOD 922>;
 
        status = "okay";
 
index 7fc0339a3ac97896710efabd22d6375bbe869314..66f3affe0469737c951f7a5f45466102725d1bb1 100644 (file)
                 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
                 <&audio_clk_a>, <&cs2000>,
                 <&audio_clk_c>,
-                <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
+                <&cpg CPG_MOD 922>;
 
        rsnd_port: port {
                rsnd_endpoint: endpoint {
index 9065dc243428f128bc65c4b4ce3d6f8d976d9973..95b0a1f6debfcefb26c2635bdd2bb4735857e6c1 100644 (file)
@@ -10,8 +10,6 @@
 #include <dt-bindings/clock/r8a774a1-cpg-mssr.h>
 #include <dt-bindings/power/r8a774a1-sysc.h>
 
-#define CPG_AUDIO_CLK_I                R8A774A1_CLK_S0D4
-
 / {
        compatible = "renesas,r8a774a1";
        #address-cells = <2>;
                                 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
                                 <&audio_clk_a>, <&audio_clk_b>,
                                 <&audio_clk_c>,
-                                <&cpg CPG_CORE R8A774A1_CLK_S0D4>;
+                                <&cpg CPG_MOD 922>;
                        clock-names = "ssi-all",
                                      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
                                      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
index 75776decd2186f7dd586328dbba4cf44a5f538a7..786660fcdea42b475610d889bb327bf3817b6138 100644 (file)
@@ -10,8 +10,6 @@
 #include <dt-bindings/clock/r8a774b1-cpg-mssr.h>
 #include <dt-bindings/power/r8a774b1-sysc.h>
 
-#define CPG_AUDIO_CLK_I                R8A774B1_CLK_S0D4
-
 / {
        compatible = "renesas,r8a774b1";
        #address-cells = <2>;
                                 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
                                 <&audio_clk_a>, <&audio_clk_b>,
                                 <&audio_clk_c>,
-                                <&cpg CPG_CORE R8A774B1_CLK_S0D4>;
+                                <&cpg CPG_MOD 922>;
                        clock-names = "ssi-all",
                                      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
                                      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
index ad2e87b039acd7ac07b4c544c00f1d8b9993f677..eed94ffed7c11cbf8bfcc167ced3fcc56d8b4180 100644 (file)
                                 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
                                 <&audio_clk_a>, <&audio_clk_b>,
                                 <&audio_clk_c>,
-                                <&cpg CPG_CORE R8A774C0_CLK_ZA2>;
+                                <&cpg CPG_MOD 922>;
                        clock-names = "ssi-all",
                                      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
                                      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
index 2acf4067ab2f23e2b6624d7d39742ee92cecb1be..175e5d296da6cec64effad9e89fdf150a6b76b64 100644 (file)
@@ -10,8 +10,6 @@
 #include <dt-bindings/clock/r8a774e1-cpg-mssr.h>
 #include <dt-bindings/power/r8a774e1-sysc.h>
 
-#define CPG_AUDIO_CLK_I                R8A774E1_CLK_S0D4
-
 / {
        compatible = "renesas,r8a774e1";
        #address-cells = <2>;
                                 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
                                 <&audio_clk_a>, <&audio_clk_b>,
                                 <&audio_clk_c>,
-                                <&cpg CPG_CORE R8A774E1_CLK_S0D4>;
+                                <&cpg CPG_MOD 922>;
                        clock-names = "ssi-all",
                                      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
                                      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
index 6d15229d25ab101d32436950ecda3f589d7f953b..a4260d9291bac365549d7d93c11b267abf70ab05 100644 (file)
@@ -9,8 +9,6 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/power/r8a7795-sysc.h>
 
-#define CPG_AUDIO_CLK_I                R8A7795_CLK_S0D4
-
 #define SOC_HAS_HDMI1
 #define SOC_HAS_SATA
 #define SOC_HAS_USB2_CH2
                                 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
                                 <&audio_clk_a>, <&audio_clk_b>,
                                 <&audio_clk_c>,
-                                <&cpg CPG_CORE R8A7795_CLK_S0D4>;
+                                <&cpg CPG_MOD 922>;
                        clock-names = "ssi-all",
                                      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
                                      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
index 17062ec506beabd5a27a51b3958eda28577b09bf..a631ead171b29a4363933ca1755fcf76f79bc653 100644 (file)
@@ -9,8 +9,6 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/power/r8a7796-sysc.h>
 
-#define CPG_AUDIO_CLK_I                R8A7796_CLK_S0D4
-
 / {
        compatible = "renesas,r8a7796";
        #address-cells = <2>;
                                 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
                                 <&audio_clk_a>, <&audio_clk_b>,
                                 <&audio_clk_c>,
-                                <&cpg CPG_CORE R8A7796_CLK_S0D4>;
+                                <&cpg CPG_MOD 922>;
                        clock-names = "ssi-all",
                                      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
                                      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
index d3f47da1b62673f5835b73095b559656d7195994..7254912a241f96f302c14a33c800546eac5d47e0 100644 (file)
@@ -9,8 +9,6 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/power/r8a77961-sysc.h>
 
-#define CPG_AUDIO_CLK_I                R8A77961_CLK_S0D4
-
 / {
        compatible = "renesas,r8a77961";
        #address-cells = <2>;
                                 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
                                 <&audio_clk_a>, <&audio_clk_b>,
                                 <&audio_clk_c>,
-                                <&cpg CPG_CORE R8A77961_CLK_S0D4>;
+                                <&cpg CPG_MOD 922>;
                        clock-names = "ssi-all",
                                      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
                                      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
index c7582003849135cd0b981a150301e488ead6e864..e57b9027066eb6e7b5ad4b176c12675841ec8c7d 100644 (file)
@@ -12,8 +12,6 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/power/r8a77965-sysc.h>
 
-#define CPG_AUDIO_CLK_I                R8A77965_CLK_S0D4
-
 #define SOC_HAS_SATA
 
 / {
                                 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
                                 <&audio_clk_a>, <&audio_clk_b>,
                                 <&audio_clk_c>,
-                                <&cpg CPG_CORE R8A77965_CLK_S0D4>;
+                                <&cpg CPG_MOD 922>;
                        clock-names = "ssi-all",
                                      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
                                      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
index 4c545eff9b423267ca0de4815155cbc3404dc5c0..8c2b28342387c7f2a5d76109eb6d0fb6113a5a44 100644 (file)
                                 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
                                 <&audio_clk_a>, <&audio_clk_b>,
                                 <&audio_clk_c>,
-                                <&cpg CPG_CORE R8A77990_CLK_ZA2>;
+                                <&cpg CPG_MOD 922>;
                        clock-names = "ssi-all",
                                      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
                                      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
index e25024a7b66ccbe3ec136c68032a6a1bdf01f45c..8cf6473c63d37dd09479150dfece4512e0724b7e 100644 (file)
                                 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
                                 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
                                 <&audio_clk_a>, <&audio_clk_b>,
-                                <&cpg CPG_CORE R8A77995_CLK_ZA2>;
+                                <&cpg CPG_MOD 922>;
                        clock-names = "ssi-all",
                                      "ssi.4", "ssi.3",
                                      "src.6", "src.5",
index 4a3d5037821f12f51664b6016969741325946ec1..1eb4883b3219709a35ab95b8c591fd23b3a462bd 100644 (file)
                 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
                 <&audio_clk_a>, <&cs2000>,
                 <&audio_clk_c>,
-                <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
+                <&cpg CPG_MOD 922>;
 
        ports {
                #address-cells = <1>;
index 0be2716659e96fba4a3636078ca50fcbc3e0131e..a2f66f916048496e2ae776e3b6202ba231d7e2a9 100644 (file)
                 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
                 <&audio_clk_a>, <&cs2000>,
                 <&audio_clk_c>,
-                <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
+                <&cpg CPG_MOD 922>;
 };
 
 &rpc {