return rc;
 }
 
+int hl_fw_cpucp_engine_core_asid_set(struct hl_device *hdev, u32 asid)
+{
+       struct cpucp_packet pkt;
+       int rc;
+
+       memset(&pkt, 0, sizeof(pkt));
+
+       pkt.ctl = cpu_to_le32(CPUCP_PACKET_ENGINE_CORE_ASID_SET << CPUCP_PKT_CTL_OPCODE_SHIFT);
+       pkt.value = cpu_to_le64(asid);
+
+       rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
+                                               HL_CPUCP_INFO_TIMEOUT_USEC, NULL);
+       if (rc)
+               dev_err(hdev->dev,
+                       "Failed on ASID configuration request for engine core, error %d\n",
+                       rc);
+
+       return rc;
+}
+
 void hl_fw_ask_hard_reset_without_linux(struct hl_device *hdev)
 {
        struct static_fw_load_mgr *static_loader =
 
 int hl_fw_dram_replaced_row_get(struct hl_device *hdev,
                                struct cpucp_hbm_row_info *info);
 int hl_fw_dram_pending_row_get(struct hl_device *hdev, u32 *pend_rows_num);
+int hl_fw_cpucp_engine_core_asid_set(struct hl_device *hdev, u32 asid);
 int hl_pci_bars_map(struct hl_device *hdev, const char * const name[3],
                        bool is_wc[3]);
 int hl_pci_elbi_read(struct hl_device *hdev, u64 addr, u32 *data);
 
  *
  * CPUCP_PACKET_POWER_SET -
  *       Resets power history of device to 0
+ *
+ * CPUCP_PACKET_ENGINE_CORE_ASID_SET -
+ *       Packet to perform engine core ASID configuration
  */
 
 enum cpucp_packet_id {
        CPUCP_PACKET_HBM_REPLACED_ROWS_INFO_GET,/* internal */
        CPUCP_PACKET_HBM_PENDING_ROWS_STATUS,   /* internal */
        CPUCP_PACKET_POWER_SET,                 /* internal */
+       CPUCP_PACKET_RESERVED,                  /* not used */
+       CPUCP_PACKET_ENGINE_CORE_ASID_SET,      /* internal */
 };
 
 #define CPUCP_PACKET_FENCE_VAL 0xFE8CE7A5