ARM: dts: ste: Align L2 cache-controller nodename with dtschema
authorKrzysztof Kozlowski <krzk@kernel.org>
Fri, 26 Jun 2020 08:05:52 +0000 (10:05 +0200)
committerLinus Walleij <linus.walleij@linaro.org>
Tue, 7 Jul 2020 12:45:39 +0000 (14:45 +0200)
Fix dtschema validator warnings like:
    l2-cache: $nodename:0: 'l2-cache' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200626080552.3627-1-krzk@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
arch/arm/boot/dts/ste-dbx5x0.dtsi
arch/arm/boot/dts/ste-nomadik-stn8815.dtsi

index 3e10da3f8fd3394d54e1196174b665850f0ac59f..05fd544b06c12193bdd408a8d8475964d1ce14e7 100644 (file)
                        reg = <0x80150000 0x2000>;
                };
 
-               L2: l2-cache {
+               L2: cache-controller {
                        compatible = "arm,pl310-cache";
                        reg = <0xa0412000 0x1000>;
                        interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
index f78b4eabd68c269b6624a7062cfdf99878530dd9..4f38aeecadb3aa93ed13356a20d982d931c7d260 100644 (file)
@@ -15,7 +15,7 @@
                    <0x08000000 0x04000000>;
        };
 
-       L2: l2-cache {
+       L2: cache-controller {
                compatible = "arm,l210-cache";
                reg = <0x10210000 0x1000>;
                interrupt-parent = <&vica>;