drm/amd/display: fix DCC settings for DCN3
authorMarek Olšák <marek.olsak@amd.com>
Thu, 30 Sep 2021 15:13:59 +0000 (11:13 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 6 Oct 2021 19:50:43 +0000 (15:50 -0400)
ind_block_64b_no_128bcl means INDEP_64B && INDEP_128B &&
MAX_COMPRESSED_BLOCK_SIZE == 64B. Only used by gfx10.3.

ind_block_64b means INDEP_64B && !INDEP_128B &&
MAX_COMPRESSED_BLOCK_SIZE == 64B. Only used by gfx9 and gfx10.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

index be2c502822fc5b4e89642f3e672a4e487b64e0e4..c718fb5f3f8a2c2aa111a200f3ccfb4886fe62ee 100644 (file)
  * - 3.41.0 - Add video codec query
  * - 3.42.0 - Add 16bpc fixed point display support
  * - 3.43.0 - Add device hot plug/unplug support
+ * - 3.44.0 - DCN3 supports DCC independent block settings: !64B && 128B, 64B && 128B
  */
 #define KMS_DRIVER_MAJOR       3
-#define KMS_DRIVER_MINOR       43
+#define KMS_DRIVER_MINOR       44
 #define KMS_DRIVER_PATCHLEVEL  0
 
 int amdgpu_vram_limit;
index a399a984b8a60dc2dfabfe632890f8a7b26bf423..49be531d68aed0a5b42b089fa24d36842dcf8230 100644 (file)
@@ -5105,11 +5105,11 @@ fill_gfx9_plane_attributes_from_modifiers(struct amdgpu_device *adev,
                dcc->independent_64b_blks = independent_64b_blks;
                if (AMD_FMT_MOD_GET(TILE_VERSION, modifier) == AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS) {
                        if (independent_64b_blks && independent_128b_blks)
-                               dcc->dcc_ind_blk = hubp_ind_block_64b;
+                               dcc->dcc_ind_blk = hubp_ind_block_64b_no_128bcl;
                        else if (independent_128b_blks)
                                dcc->dcc_ind_blk = hubp_ind_block_128b;
                        else if (independent_64b_blks && !independent_128b_blks)
-                               dcc->dcc_ind_blk = hubp_ind_block_64b_no_128bcl;
+                               dcc->dcc_ind_blk = hubp_ind_block_64b;
                        else
                                dcc->dcc_ind_blk = hubp_ind_block_unconstrained;
                } else {