QLA8XXX_CRB_TEMP_STATE,
};
-static const uint32_t qla4_82xx_reg_tbl[] = {
- QLA82XX_PEG_HALT_STATUS1,
- QLA82XX_PEG_HALT_STATUS2,
- QLA82XX_PEG_ALIVE_COUNTER,
- QLA82XX_CRB_DRV_ACTIVE,
- QLA82XX_CRB_DEV_STATE,
- QLA82XX_CRB_DRV_STATE,
- QLA82XX_CRB_DRV_SCRATCH,
- QLA82XX_CRB_DEV_PART_INFO,
- QLA82XX_CRB_DRV_IDC_VERSION,
- QLA82XX_FW_VERSION_MAJOR,
- QLA82XX_FW_VERSION_MINOR,
- QLA82XX_FW_VERSION_SUB,
- CRB_CMDPEG_STATE,
- CRB_TEMP_STATE,
-};
-
/* Every driver should use these Device State */
#define QLA8XXX_DEV_COLD 1
#define QLA8XXX_DEV_INITIALIZING 2
static struct qla4_8xxx_legacy_intr_set legacy_intr[] =
QLA82XX_LEGACY_INTR_CONFIG;
+static const uint32_t qla4_82xx_reg_tbl[] = {
+ QLA82XX_PEG_HALT_STATUS1,
+ QLA82XX_PEG_HALT_STATUS2,
+ QLA82XX_PEG_ALIVE_COUNTER,
+ QLA82XX_CRB_DRV_ACTIVE,
+ QLA82XX_CRB_DEV_STATE,
+ QLA82XX_CRB_DRV_STATE,
+ QLA82XX_CRB_DRV_SCRATCH,
+ QLA82XX_CRB_DEV_PART_INFO,
+ QLA82XX_CRB_DRV_IDC_VERSION,
+ QLA82XX_FW_VERSION_MAJOR,
+ QLA82XX_FW_VERSION_MINOR,
+ QLA82XX_FW_VERSION_SUB,
+ CRB_CMDPEG_STATE,
+ CRB_TEMP_STATE,
+};
+
static const uint32_t qla4_83xx_reg_tbl[] = {
QLA83XX_PEG_HALT_STATUS1,
QLA83XX_PEG_HALT_STATUS2,