coresight: tmc-etr: Use perf_output_handle::head for AUX ring buffer

When enable the Arm CoreSight PMU event, the context for AUX ring buffer
is prepared in the structure perf_output_handle, and its field "head"
points the head of the AUX ring buffer and it is updated after filling
AUX trace data into buffer.

Current code uses an extra field etr_perf_buffer::head to maintain the
header for the AUX ring buffer which is not necessary; alternatively,
it's better to directly use perf_output_handle::head.

This patch removes the field etr_perf_buffer::head and directly uses
perf_output_handle::head for the head of AUX ring buffer.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20210912125748.2816606-2-leo.yan@linaro.org
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>

diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
index 7f4654b723146c4caf7dafd755a015a0ba9fff89..14a86a232a18102aa227d0c5a31e070e22c4c470 100644 (file)
--- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
@@ -32,7 +32,6 @@ struct etr_flat_buf {
  * @etr_buf            - Actual buffer used by the ETR
  * @pid                        - The PID this etr_perf_buffer belongs to.
  * @snaphost           - Perf session mode
- * @head               - handle->head at the beginning of the session.
  * @nr_pages           - Number of pages in the ring buffer.
  * @pages              - Array of Pages in the ring buffer.
  */
@@ -41,7 +40,6 @@ struct etr_perf_buffer {
        struct etr_buf          *etr_buf;
        pid_t                   pid;
        bool                    snapshot;
-       unsigned long           head;
        int                     nr_pages;
        void                    **pages;
 };
@@ -1438,16 +1436,16 @@ free_etr_perf_buffer:
  * buffer to the perf ring buffer.
  */
 static void tmc_etr_sync_perf_buffer(struct etr_perf_buffer *etr_perf,
+                                    unsigned long head,
                                     unsigned long src_offset,
                                     unsigned long to_copy)
 {
        long bytes;
        long pg_idx, pg_offset;
-       unsigned long head = etr_perf->head;
        char **dst_pages, *src_buf;
        struct etr_buf *etr_buf = etr_perf->etr_buf;
 
-       head = etr_perf->head;
+       head = PERF_IDX2OFF(head, etr_perf);
        pg_idx = head >> PAGE_SHIFT;
        pg_offset = head & (PAGE_SIZE - 1);
        dst_pages = (char **)etr_perf->pages;
@@ -1554,7 +1552,7 @@ tmc_update_etr_buffer(struct coresight_device *csdev,
        /* Insert barrier packets at the beginning, if there was an overflow */
        if (lost)
                tmc_etr_buf_insert_barrier_packet(etr_buf, offset);
-       tmc_etr_sync_perf_buffer(etr_perf, offset, size);
+       tmc_etr_sync_perf_buffer(etr_perf, handle->head, offset, size);
 
        /*
         * In snapshot mode we simply increment the head by the number of byte
@@ -1614,8 +1612,6 @@ static int tmc_enable_etr_sink_perf(struct coresight_device *csdev, void *data)
                goto unlock_out;
        }
 
-       etr_perf->head = PERF_IDX2OFF(handle->head, etr_perf);
-
        /*
         * No HW configuration is needed if the sink is already in
         * use for this session.