RISC-V: KVM: Allow Zfh[min] extensions for Guest/VM
authorAnup Patel <apatel@ventanamicro.com>
Mon, 27 Nov 2023 16:31:55 +0000 (22:01 +0530)
committerAnup Patel <anup@brainfault.org>
Fri, 19 Jan 2024 03:50:02 +0000 (09:20 +0530)
We extend the KVM ISA extension ONE_REG interface to allow KVM
user space to detect and enable Zfh[min] extensions for Guest/VM.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
arch/riscv/include/uapi/asm/kvm.h
arch/riscv/kvm/vcpu_onereg.c

index e68ba0819ef7542ef6c686002fa79ed162151bef..a8411ae5cc85c16bedaf4b1f6e00d43048905089 100644 (file)
@@ -160,6 +160,8 @@ enum KVM_RISCV_ISA_EXT_ID {
        KVM_RISCV_ISA_EXT_ZVKSED,
        KVM_RISCV_ISA_EXT_ZVKSH,
        KVM_RISCV_ISA_EXT_ZVKT,
+       KVM_RISCV_ISA_EXT_ZFH,
+       KVM_RISCV_ISA_EXT_ZFHMIN,
        KVM_RISCV_ISA_EXT_MAX,
 };
 
index 297acdcfed7757b91b5003a8961615760e5bca36..e00745bf05905c09ce61f755a61094580c61f2f3 100644 (file)
@@ -47,6 +47,8 @@ static const unsigned long kvm_isa_ext_arr[] = {
        KVM_ISA_EXT_ARR(ZBKC),
        KVM_ISA_EXT_ARR(ZBKX),
        KVM_ISA_EXT_ARR(ZBS),
+       KVM_ISA_EXT_ARR(ZFH),
+       KVM_ISA_EXT_ARR(ZFHMIN),
        KVM_ISA_EXT_ARR(ZICBOM),
        KVM_ISA_EXT_ARR(ZICBOZ),
        KVM_ISA_EXT_ARR(ZICNTR),
@@ -118,6 +120,8 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
        case KVM_RISCV_ISA_EXT_ZBKC:
        case KVM_RISCV_ISA_EXT_ZBKX:
        case KVM_RISCV_ISA_EXT_ZBS:
+       case KVM_RISCV_ISA_EXT_ZFH:
+       case KVM_RISCV_ISA_EXT_ZFHMIN:
        case KVM_RISCV_ISA_EXT_ZICNTR:
        case KVM_RISCV_ISA_EXT_ZICOND:
        case KVM_RISCV_ISA_EXT_ZICSR: