Enable I2C Serial Engines 1, 2 and 3 which are known to have hardware
connected to them, leaving the rest disabled to save on power. For
this, only GPI DMA 0 and QUP 0 need to be enabled, as nothing seems to
be connected to Serial Engines on GPU DMA 1 / QUP 1. Beyond this
downstream only defines a UART console available on Serial Engine 4
which also resides on QUP 0.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Martin Botka <martin.botka@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221216233408.1283581-4-marijn.suijten@somainline.org
};
};
+&gpi_dma0 {
+ status = "okay";
+};
+
&hsusb_phy1 {
vdd-supply = <&pm6125_l7>;
vdda-pll-supply = <&pm6125_l10>;
status = "okay";
};
+&i2c1 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ /* NXP PN553 NFC @ 28 */
+};
+
+&i2c2 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ /* Samsung touchscreen @ 48 */
+};
+
+&i2c3 {
+ clock-frequency = <1000000>;
+ status = "okay";
+
+ /* Cirrus Logic CS35L41 boosted audio amplifier @ 40 */
+};
+
&pm6125_adc {
pinctrl-names = "default";
pinctrl-0 = <&camera_flash_therm &emmc_ufs_therm &rf_pa1_therm>;
};
};
+&qupv3_id_0 {
+ status = "okay";
+};
+
&sdc2_off_state {
sd-cd-pins {
pins = "gpio98";