arm64: dts: exynos: Update cache properties
authorPierre Gondois <pierre.gondois@arm.com>
Wed, 23 Nov 2022 09:24:44 +0000 (10:24 +0100)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Mon, 26 Dec 2022 14:45:44 +0000 (15:45 +0100)
The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the
properties for unified cache is present ('cache-size', ...).

Update the Device Trees accordingly.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Link: https://lore.kernel.org/r/20221123092449.88097-2-pierre.gondois@arm.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
arch/arm64/boot/dts/exynos/exynos5433.dtsi
arch/arm64/boot/dts/exynos/exynos7.dtsi

index bd6a354b9cb570797c8deb832f3dbc74a4cfb840..8619920da4b6f48c69e59f36ad527a655ee814b4 100644 (file)
 
                cluster_a57_l2: l2-cache0 {
                        compatible = "cache";
+                       cache-level = <2>;
+                       cache-unified;
                        cache-size = <0x200000>;
                        cache-line-size = <64>;
                        cache-sets = <2048>;
 
                cluster_a53_l2: l2-cache1 {
                        compatible = "cache";
+                       cache-level = <2>;
+                       cache-unified;
                        cache-size = <0x40000>;
                        cache-line-size = <64>;
                        cache-sets = <256>;
index 1cd771c90b47126cd35beefd9ab3ae3493cf642e..f378d8629d88c79e2b6b148e74e369478ea38dc5 100644 (file)
 
                atlas_l2: l2-cache0 {
                        compatible = "cache";
+                       cache-level = <2>;
+                       cache-unified;
                        cache-size = <0x200000>;
                        cache-line-size = <64>;
                        cache-sets = <2048>;