mfd: dbx500-prcmu: Drop set_display_clocks()
authorLinus Walleij <linus.walleij@linaro.org>
Sat, 28 Dec 2019 22:26:14 +0000 (23:26 +0100)
committerLee Jones <lee.jones@linaro.org>
Fri, 24 Jan 2020 07:33:58 +0000 (07:33 +0000)
The display clocks are handled by the generic clock framework
since ages, this code is completely unused and misleading.
Delete it.

Cc: Stephan Gerhold <stephan@gerhold.net>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
drivers/mfd/db8500-prcmu.c
include/linux/mfd/db8500-prcmu.h
include/linux/mfd/dbx500-prcmu.h

index 26d967a1a046571d86c64a957f1889afa17b8555..5f0cfeec8b6a919e6799a9080d79e7d3f4542983 100644 (file)
@@ -555,14 +555,6 @@ static struct dsiescclk dsiescclk[3] = {
 #define PRCMU_CLK_38_SRC               (1 << 10)
 #define PRCMU_CLK_38_DIV               (1 << 11)
 
-/* PLLDIV=12, PLLSW=4 (PLLDDR) */
-#define PRCMU_DSI_CLOCK_SETTING                0x0000008C
-
-/* DPI 50000000 Hz */
-#define PRCMU_DPI_CLOCK_SETTING                ((1 << PRCMU_CLK_PLL_SW_SHIFT) | \
-                                         (16 << PRCMU_CLK_PLL_DIV_SHIFT))
-#define PRCMU_DSI_LP_CLOCK_SETTING     0x00000E00
-
 /* D=101, N=1, R=4, SELDIV2=0 */
 #define PRCMU_PLLDSI_FREQ_SETTING      0x00040165
 
@@ -616,28 +608,6 @@ int db8500_prcmu_disable_dsipll(void)
        return 0;
 }
 
-int db8500_prcmu_set_display_clocks(void)
-{
-       unsigned long flags;
-
-       spin_lock_irqsave(&clk_mgt_lock, flags);
-
-       /* Grab the HW semaphore. */
-       while ((readl(PRCM_SEM) & PRCM_SEM_PRCM_SEM) != 0)
-               cpu_relax();
-
-       writel(PRCMU_DSI_CLOCK_SETTING, prcmu_base + PRCM_HDMICLK_MGT);
-       writel(PRCMU_DSI_LP_CLOCK_SETTING, prcmu_base + PRCM_TVCLK_MGT);
-       writel(PRCMU_DPI_CLOCK_SETTING, prcmu_base + PRCM_LCDCLK_MGT);
-
-       /* Release the HW semaphore. */
-       writel(0, PRCM_SEM);
-
-       spin_unlock_irqrestore(&clk_mgt_lock, flags);
-
-       return 0;
-}
-
 u32 db8500_prcmu_read(unsigned int reg)
 {
        return readl(prcmu_base + reg);
index 1fc75d2b4a38bdbcffeef7390fab7a18c1cab71a..7d0c442e0c2514353f953123695702a090191c10 100644 (file)
@@ -525,7 +525,6 @@ u8 db8500_prcmu_get_power_state_result(void);
 void db8500_prcmu_enable_wakeups(u32 wakeups);
 int db8500_prcmu_set_epod(u16 epod_id, u8 epod_state);
 int db8500_prcmu_request_clock(u8 clock, bool enable);
-int db8500_prcmu_set_display_clocks(void);
 int db8500_prcmu_disable_dsipll(void);
 int db8500_prcmu_enable_dsipll(void);
 void db8500_prcmu_config_abb_event_readout(u32 abb_events);
@@ -682,11 +681,6 @@ static inline int db8500_prcmu_request_clock(u8 clock, bool enable)
        return 0;
 }
 
-static inline int db8500_prcmu_set_display_clocks(void)
-{
-       return 0;
-}
-
 static inline int db8500_prcmu_disable_dsipll(void)
 {
        return 0;
index e2571040c7e8e7ffdca70f68fbebc4322e1bed33..812b6c3c4ef645c6ab2f334d24d1e9d1d1ce04a6 100644 (file)
@@ -321,11 +321,6 @@ static inline bool prcmu_is_ac_wake_requested(void)
        return db8500_prcmu_is_ac_wake_requested();
 }
 
-static inline int prcmu_set_display_clocks(void)
-{
-       return db8500_prcmu_set_display_clocks();
-}
-
 static inline int prcmu_disable_dsipll(void)
 {
        return db8500_prcmu_disable_dsipll();
@@ -511,11 +506,6 @@ static inline bool prcmu_is_ac_wake_requested(void)
        return false;
 }
 
-static inline int prcmu_set_display_clocks(void)
-{
-       return 0;
-}
-
 static inline int prcmu_disable_dsipll(void)
 {
        return 0;