drm/amd/display: If P-State is supported try SubVP for smaller vlevel
authorAlvin Lee <alvin.lee2@amd.com>
Thu, 9 Nov 2023 23:08:17 +0000 (18:08 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 29 Nov 2023 21:49:00 +0000 (16:49 -0500)
[Description]
- To reduce vlevel further, we can try to apply subvp on
  configs that already support p-state since the natural
  p-state support may not allow for DPM0.
- Add code to try subvp to reduce UCLK DPM level further
  if already supported, but don't use subvp if it does not
  optimize the DPM level even lower

Reviewed-by: Samson Tam <samson.tam@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

index c4ffb4b92b56367094e6ecf0358733269de678b5..26411d4e97300da240c8b30760ab7824933e9cf1 100644 (file)
@@ -1416,6 +1416,7 @@ static void dcn32_full_validate_bw_helper(struct dc *dc,
        unsigned int dc_pipe_idx = 0;
        int i = 0;
        bool found_supported_config = false;
+       int vlevel_temp = 0;
 
        dc_assert_fp_enabled();
 
@@ -1448,13 +1449,15 @@ static void dcn32_full_validate_bw_helper(struct dc *dc,
         */
        if (!dc->debug.force_disable_subvp && !dc->caps.dmub_caps.gecc_enable && dcn32_all_pipes_have_stream_and_plane(dc, context) &&
            !dcn32_mpo_in_use(context) && !dcn32_any_surfaces_rotated(dc, context) && !is_test_pattern_enabled(context) &&
-               (*vlevel == context->bw_ctx.dml.soc.num_states ||
+               (*vlevel == context->bw_ctx.dml.soc.num_states || (vba->DRAMSpeedPerState[*vlevel] != vba->DRAMSpeedPerState[0] &&
+                               vba->DRAMClockChangeSupport[*vlevel][vba->maxMpcComb] != dm_dram_clock_change_unsupported) ||
            vba->DRAMClockChangeSupport[*vlevel][vba->maxMpcComb] == dm_dram_clock_change_unsupported ||
            dc->debug.force_subvp_mclk_switch)) {
 
                dcn32_merge_pipes_for_subvp(dc, context);
                memset(merge, 0, MAX_PIPES * sizeof(bool));
 
+               vlevel_temp = *vlevel;
                /* to re-initialize viewport after the pipe merge */
                for (i = 0; i < dc->res_pool->pipe_count; i++) {
                        struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
@@ -1523,6 +1526,9 @@ static void dcn32_full_validate_bw_helper(struct dc *dc,
                        }
                }
 
+               if (vba->DRAMSpeedPerState[*vlevel] >= vba->DRAMSpeedPerState[vlevel_temp])
+                       found_supported_config = false;
+
                // If SubVP pipe config is unsupported (or cannot be used for UCLK switching)
                // remove phantom pipes and repopulate dml pipes
                if (!found_supported_config) {