soc: renesas: rcar-sysc: Add r8a774e1 support
authorMarian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Tue, 7 Jul 2020 16:18:05 +0000 (17:18 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 13 Jul 2020 08:34:41 +0000 (10:34 +0200)
Add support for RZ/G2H (R8A774E1) SoC power areas to the R-Car SYSC
driver.

Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1594138692-16816-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/soc/renesas/Kconfig
drivers/soc/renesas/Makefile
drivers/soc/renesas/r8a774e1-sysc.c [new file with mode: 0644]
drivers/soc/renesas/rcar-sysc.c
drivers/soc/renesas/rcar-sysc.h

index 53cd8d2d0cd221d10034697d12f4147d0f4e8199..bb69ca22b5b4ebbe252a22102c407cf2570113ef 100644 (file)
@@ -296,6 +296,10 @@ config SYSC_R8A774C0
        bool "RZ/G2E System Controller support" if COMPILE_TEST
        select SYSC_RCAR
 
+config SYSC_R8A774E1
+       bool "RZ/G2H System Controller support" if COMPILE_TEST
+       select SYSC_RCAR
+
 config SYSC_R8A7779
        bool "R-Car H1 System Controller support" if COMPILE_TEST
        select SYSC_RCAR
index 08296d78e2ad9f266a779f05b487f22810275f32..10a399fc486a617d888ae7c76a965e0a9bd85a1e 100644 (file)
@@ -10,6 +10,7 @@ obj-$(CONFIG_SYSC_R8A77470)   += r8a77470-sysc.o
 obj-$(CONFIG_SYSC_R8A774A1)    += r8a774a1-sysc.o
 obj-$(CONFIG_SYSC_R8A774B1)    += r8a774b1-sysc.o
 obj-$(CONFIG_SYSC_R8A774C0)    += r8a774c0-sysc.o
+obj-$(CONFIG_SYSC_R8A774E1)    += r8a774e1-sysc.o
 obj-$(CONFIG_SYSC_R8A7779)     += r8a7779-sysc.o
 obj-$(CONFIG_SYSC_R8A7790)     += r8a7790-sysc.o
 obj-$(CONFIG_SYSC_R8A7791)     += r8a7791-sysc.o
diff --git a/drivers/soc/renesas/r8a774e1-sysc.c b/drivers/soc/renesas/r8a774e1-sysc.c
new file mode 100644 (file)
index 0000000..18449f7
--- /dev/null
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Renesas RZ/G2H System Controller
+ * Copyright (C) 2020 Renesas Electronics Corp.
+ *
+ * Based on Renesas R-Car H3 System Controller
+ * Copyright (C) 2016-2017 Glider bvba
+ */
+
+#include <linux/kernel.h>
+
+#include <dt-bindings/power/r8a774e1-sysc.h>
+
+#include "rcar-sysc.h"
+
+static const struct rcar_sysc_area r8a774e1_areas[] __initconst = {
+       { "always-on",      0, 0, R8A774E1_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
+       { "ca57-scu",   0x1c0, 0, R8A774E1_PD_CA57_SCU, R8A774E1_PD_ALWAYS_ON, PD_SCU },
+       { "ca57-cpu0",   0x80, 0, R8A774E1_PD_CA57_CPU0, R8A774E1_PD_CA57_SCU, PD_CPU_NOCR },
+       { "ca57-cpu1",   0x80, 1, R8A774E1_PD_CA57_CPU1, R8A774E1_PD_CA57_SCU, PD_CPU_NOCR },
+       { "ca57-cpu2",   0x80, 2, R8A774E1_PD_CA57_CPU2, R8A774E1_PD_CA57_SCU, PD_CPU_NOCR },
+       { "ca57-cpu3",   0x80, 3, R8A774E1_PD_CA57_CPU3, R8A774E1_PD_CA57_SCU, PD_CPU_NOCR },
+       { "ca53-scu",   0x140, 0, R8A774E1_PD_CA53_SCU, R8A774E1_PD_ALWAYS_ON, PD_SCU },
+       { "ca53-cpu0",  0x200, 0, R8A774E1_PD_CA53_CPU0, R8A774E1_PD_CA53_SCU, PD_CPU_NOCR },
+       { "ca53-cpu1",  0x200, 1, R8A774E1_PD_CA53_CPU1, R8A774E1_PD_CA53_SCU, PD_CPU_NOCR },
+       { "ca53-cpu2",  0x200, 2, R8A774E1_PD_CA53_CPU2, R8A774E1_PD_CA53_SCU, PD_CPU_NOCR },
+       { "ca53-cpu3",  0x200, 3, R8A774E1_PD_CA53_CPU3, R8A774E1_PD_CA53_SCU, PD_CPU_NOCR },
+       { "a3vp",       0x340, 0, R8A774E1_PD_A3VP, R8A774E1_PD_ALWAYS_ON },
+       { "a3vc",       0x380, 0, R8A774E1_PD_A3VC, R8A774E1_PD_ALWAYS_ON },
+       { "a2vc1",      0x3c0, 1, R8A774E1_PD_A2VC1, R8A774E1_PD_A3VC },
+       { "3dg-a",      0x100, 0, R8A774E1_PD_3DG_A, R8A774E1_PD_ALWAYS_ON },
+       { "3dg-b",      0x100, 1, R8A774E1_PD_3DG_B, R8A774E1_PD_3DG_A },
+       { "3dg-c",      0x100, 2, R8A774E1_PD_3DG_C, R8A774E1_PD_3DG_B },
+       { "3dg-d",      0x100, 3, R8A774E1_PD_3DG_D, R8A774E1_PD_3DG_C },
+       { "3dg-e",      0x100, 4, R8A774E1_PD_3DG_E, R8A774E1_PD_3DG_D },
+};
+
+const struct rcar_sysc_info r8a774e1_sysc_info __initconst = {
+       .areas = r8a774e1_areas,
+       .num_areas = ARRAY_SIZE(r8a774e1_areas),
+       .extmask_offs = 0x2f8,
+       .extmask_val = BIT(0),
+};
index 04ea87a188f12f70d3ce74f63b24fcc842ed8288..9b235fc9002734052937fa4930025f9cf722dda6 100644 (file)
@@ -296,6 +296,9 @@ static const struct of_device_id rcar_sysc_matches[] __initconst = {
 #ifdef CONFIG_SYSC_R8A774C0
        { .compatible = "renesas,r8a774c0-sysc", .data = &r8a774c0_sysc_info },
 #endif
+#ifdef CONFIG_SYSC_R8A774E1
+       { .compatible = "renesas,r8a774e1-sysc", .data = &r8a774e1_sysc_info },
+#endif
 #ifdef CONFIG_SYSC_R8A7779
        { .compatible = "renesas,r8a7779-sysc", .data = &r8a7779_sysc_info },
 #endif
index e417f26fe1553a84321667061c7ac2085d31115c..8d861c1cfdf78b6f03b43922ec644a2a45d2577c 100644 (file)
@@ -56,6 +56,7 @@ extern const struct rcar_sysc_info r8a77470_sysc_info;
 extern const struct rcar_sysc_info r8a774a1_sysc_info;
 extern const struct rcar_sysc_info r8a774b1_sysc_info;
 extern const struct rcar_sysc_info r8a774c0_sysc_info;
+extern const struct rcar_sysc_info r8a774e1_sysc_info;
 extern const struct rcar_sysc_info r8a7779_sysc_info;
 extern const struct rcar_sysc_info r8a7790_sysc_info;
 extern const struct rcar_sysc_info r8a7791_sysc_info;