serial: stm32: fix startup by enabling usart for reception

RX is configured, but usart is not enabled in startup function.
Kernel documentation specifies that startup should enable the port for
reception.
Fix the startup by enabling usart for reception.

Fixes: 84872dc448fe ("serial: stm32: add RX and TX FIFO flush")
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Link: https://lore.kernel.org/r/20210304162308.8984-3-erwan.leray@foss.st.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 3d58824ac2af21cc12540cd21269f455f7060d26..c6ca8f964c696269283a6b9ab325bc9d9b5c7c76 100644 (file)
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -634,6 +634,7 @@ static int stm32_usart_startup(struct uart_port *port)
 {
        struct stm32_port *stm32_port = to_stm32_port(port);
        const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
+       const struct stm32_usart_config *cfg = &stm32_port->info->cfg;
        const char *name = to_platform_device(port->dev)->name;
        u32 val;
        int ret;
@@ -658,7 +659,7 @@ static int stm32_usart_startup(struct uart_port *port)
        }
 
        /* RX FIFO enabling */
-       val = stm32_port->cr1_irq | USART_CR1_RE;
+       val = stm32_port->cr1_irq | USART_CR1_RE | BIT(cfg->uart_enable_bit);
        if (stm32_port->fifoen)
                val |= USART_CR1_FIFOEN;
        stm32_usart_set_bits(port, ofs->cr1, val);