riscv: add ISA extension parsing for Zvfh[min]

Add parsing for Zvfh[min] ISA extension[1] which were ratified in
june 2023 around commit e2ccd0548d6c ("Remove draft warnings from
Zvfh[min]") in riscv-v-spec[2].

Link: https://drive.google.com/file/d/1_Yt60HGAf1r1hx7JnsIptw0sqkBd9BQ8/view
Link: https://github.com/riscv/riscv-v-spec/commits/e2ccd0548d6c
Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Evan Green <evan@rivosinc.com>
Link: https://lore.kernel.org/r/20231114141256.126749-16-cleger@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h
index 97d106fa0f548d0e05c8389d013d753160d6c715..103d4f0aaf15c546f919371b8bbcf595a012b463 100644 (file)
--- a/arch/riscv/include/asm/hwcap.h
+++ b/arch/riscv/include/asm/hwcap.h
@@ -81,6 +81,8 @@
 #define RISCV_ISA_EXT_ZFH              66
 #define RISCV_ISA_EXT_ZFHMIN           67
 #define RISCV_ISA_EXT_ZIHINTNTL                68
+#define RISCV_ISA_EXT_ZVFH             69
+#define RISCV_ISA_EXT_ZVFHMIN          70
 
 #define RISCV_ISA_EXT_MAX              128
 #define RISCV_ISA_EXT_INVALID          U32_MAX

diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
index e73ee4cfd84a19163a718030993dc5367250bf77..623a5fa48cf414a03d91e24479c99b52a63a4162 100644 (file)
--- a/arch/riscv/kernel/cpufeature.c
+++ b/arch/riscv/kernel/cpufeature.c
@@ -280,6 +280,8 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = {
        __RISCV_ISA_EXT_DATA(zksh, RISCV_ISA_EXT_ZKSH),
        __RISCV_ISA_EXT_SUPERSET(zvbb, RISCV_ISA_EXT_ZVBB, riscv_zvbb_exts),
        __RISCV_ISA_EXT_DATA(zvbc, RISCV_ISA_EXT_ZVBC),
+       __RISCV_ISA_EXT_DATA(zvfh, RISCV_ISA_EXT_ZVFH),
+       __RISCV_ISA_EXT_DATA(zvfhmin, RISCV_ISA_EXT_ZVFHMIN),
        __RISCV_ISA_EXT_DATA(zvkb, RISCV_ISA_EXT_ZVKB),
        __RISCV_ISA_EXT_DATA(zvkg, RISCV_ISA_EXT_ZVKG),
        __RISCV_ISA_EXT_BUNDLE(zvkn, riscv_zvkn_bundled_exts),