riscv: dts: microchip: remove unused pcie clocks
authorConor Dooley <conor.dooley@microchip.com>
Tue, 15 Nov 2022 15:25:47 +0000 (15:25 +0000)
committerConor Dooley <conor.dooley@microchip.com>
Thu, 17 Nov 2022 19:22:44 +0000 (19:22 +0000)
The PCIe root port in the designs that ship with the PolarBerry and
M100PFSEVP are connected via one, not two Fabric Interface Controllers
(FIC). The one at 0x20_0000_0000 is fic0, so remove the fic1 clocks from
the dt node.

The same clock provides both, so this is harmless but inaccurate.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
arch/riscv/boot/dts/microchip/mpfs-m100pfs-fabric.dtsi
arch/riscv/boot/dts/microchip/mpfs-polarberry-fabric.dtsi

index 7b9ee13b6a3af017b2558e7fbbd0994368618cc3..8230f06ddf48a6e3c7178f1b43cbffdec1d651cb 100644 (file)
@@ -30,8 +30,8 @@
                                <0 0 0 3 &pcie_intc 2>,
                                <0 0 0 4 &pcie_intc 3>;
                interrupt-map-mask = <0 0 0 7>;
-               clocks = <&fabric_clk1>, <&fabric_clk1>, <&fabric_clk3>;
-               clock-names = "fic0", "fic1", "fic3";
+               clocks = <&fabric_clk1>, <&fabric_clk3>;
+               clock-names = "fic0", "fic3";
                ranges = <0x3000000 0x0 0x8000000 0x20 0x8000000 0x0 0x80000000>;
                msi-parent = <&pcie>;
                msi-controller;
index 67303bc0e451bc1b180f6a4ab2914b6d4b71b62f..9a56de7b91d64c48ebaea95daaba794a6822e729 100644 (file)
@@ -30,8 +30,8 @@
                                <0 0 0 3 &pcie_intc 2>,
                                <0 0 0 4 &pcie_intc 3>;
                interrupt-map-mask = <0 0 0 7>;
-               clocks = <&fabric_clk1>, <&fabric_clk1>, <&fabric_clk3>;
-               clock-names = "fic0", "fic1", "fic3";
+               clocks = <&fabric_clk1>, <&fabric_clk3>;
+               clock-names = "fic0", "fic3";
                ranges = <0x3000000 0x0 0x8000000 0x20 0x8000000 0x0 0x80000000>;
                msi-parent = <&pcie>;
                msi-controller;