ARM: tegra: Add missing clock-names for SDHCI controllers
authorThierry Reding <treding@nvidia.com>
Thu, 11 Jun 2020 17:52:07 +0000 (19:52 +0200)
committerThierry Reding <treding@nvidia.com>
Thu, 25 Jun 2020 07:29:44 +0000 (09:29 +0200)
The Tegra SDHCI controllers need to have a clock-names property
according to the bindings.

Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm/boot/dts/tegra124.dtsi
arch/arm/boot/dts/tegra20.dtsi
arch/arm/boot/dts/tegra30.dtsi

index c03df6a3a9e053abc1968388e69ec718000e62d5..782c00b8b35555ea385e1fd3b4eb4515846ffb14 100644 (file)
                reg = <0x0 0x700b0000 0x0 0x200>;
                interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&tegra_car TEGRA124_CLK_SDMMC1>;
+               clock-names = "sdhci";
                resets = <&tegra_car 14>;
                reset-names = "sdhci";
                status = "disabled";
                reg = <0x0 0x700b0200 0x0 0x200>;
                interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&tegra_car TEGRA124_CLK_SDMMC2>;
+               clock-names = "sdhci";
                resets = <&tegra_car 9>;
                reset-names = "sdhci";
                status = "disabled";
                reg = <0x0 0x700b0400 0x0 0x200>;
                interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&tegra_car TEGRA124_CLK_SDMMC3>;
+               clock-names = "sdhci";
                resets = <&tegra_car 69>;
                reset-names = "sdhci";
                status = "disabled";
                reg = <0x0 0x700b0600 0x0 0x200>;
                interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&tegra_car TEGRA124_CLK_SDMMC4>;
+               clock-names = "sdhci";
                resets = <&tegra_car 15>;
                reset-names = "sdhci";
                status = "disabled";
index 7a6ccbcfd80f58512da545b10b2c5194f2645eb3..e51d7618f9c9340e8e71ed1d2c75f0b13dea7c12 100644 (file)
                reg = <0xc8000000 0x200>;
                interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&tegra_car TEGRA20_CLK_SDMMC1>;
+               clock-names = "sdhci";
                resets = <&tegra_car 14>;
                reset-names = "sdhci";
                status = "disabled";
                reg = <0xc8000200 0x200>;
                interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&tegra_car TEGRA20_CLK_SDMMC2>;
+               clock-names = "sdhci";
                resets = <&tegra_car 9>;
                reset-names = "sdhci";
                status = "disabled";
                reg = <0xc8000400 0x200>;
                interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&tegra_car TEGRA20_CLK_SDMMC3>;
+               clock-names = "sdhci";
                resets = <&tegra_car 69>;
                reset-names = "sdhci";
                status = "disabled";
                reg = <0xc8000600 0x200>;
                interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&tegra_car TEGRA20_CLK_SDMMC4>;
+               clock-names = "sdhci";
                resets = <&tegra_car 15>;
                reset-names = "sdhci";
                status = "disabled";
index a3ea45c43bdf5c10621849fcbc9878edef94da32..def18a86a36a3621e6f459e92fb1dfae491b1ae4 100644 (file)
                reg = <0x78000000 0x200>;
                interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&tegra_car TEGRA30_CLK_SDMMC1>;
+               clock-names = "sdhci";
                resets = <&tegra_car 14>;
                reset-names = "sdhci";
                status = "disabled";
                reg = <0x78000200 0x200>;
                interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&tegra_car TEGRA30_CLK_SDMMC2>;
+               clock-names = "sdhci";
                resets = <&tegra_car 9>;
                reset-names = "sdhci";
                status = "disabled";
                reg = <0x78000400 0x200>;
                interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&tegra_car TEGRA30_CLK_SDMMC3>;
+               clock-names = "sdhci";
                resets = <&tegra_car 69>;
                reset-names = "sdhci";
                status = "disabled";
                reg = <0x78000600 0x200>;
                interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&tegra_car TEGRA30_CLK_SDMMC4>;
+               clock-names = "sdhci";
                resets = <&tegra_car 15>;
                reset-names = "sdhci";
                status = "disabled";