mips: dts: ralink: mt7621: reorder spi0 node attributes

Reorder the attributes of the SPI controller node so that
they're aligned with the DTS style guide.

Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
Reviewed-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 87a3bcbc0ea582028ef6ba3cd140929f2f3c4d33..60dfbae53712cdf967d181a93deed7758a01c443 100644 (file)
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -183,22 +183,22 @@
                };
 
                spi0: spi@b00 {
-                       status = "disabled";
-
                        compatible = "ralink,mt7621-spi";
                        reg = <0xb00 0x100>;
 
-                       clocks = <&sysc MT7621_CLK_SPI>;
-                       clock-names = "spi";
-
-                       resets = <&sysc MT7621_RST_SPI>;
-                       reset-names = "spi";
-
                        #address-cells = <1>;
                        #size-cells = <0>;
 
+                       clock-names = "spi";
+                       clocks = <&sysc MT7621_CLK_SPI>;
+
                        pinctrl-names = "default";
                        pinctrl-0 = <&spi_pins>;
+
+                       reset-names = "spi";
+                       resets = <&sysc MT7621_RST_SPI>;
+
+                       status = "disabled";
                };
        };