arm: dts: mt7623: add musb device nodes
authorSungbo Eo <mans0n@gorani.run>
Mon, 30 Aug 2021 15:59:02 +0000 (00:59 +0900)
committerMatthias Brugger <matthias.bgg@gmail.com>
Mon, 20 Sep 2021 12:00:24 +0000 (14:00 +0200)
MT7623 has an musb controller that is compatible with the one from MT2701.

Signed-off-by: Sungbo Eo <mans0n@gorani.run>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210830155903.13907-2-mans0n@gorani.run
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
arch/arm/boot/dts/mt7623.dtsi
arch/arm/boot/dts/mt7623a.dtsi

index a7d62dbad6026b6ff516147aff7277278249f7e8..f4848362b3be60e0269df28c4df00e2b588753ef 100644 (file)
                status = "disabled";
        };
 
+       usb0: usb@11200000 {
+               compatible = "mediatek,mt7623-musb",
+                            "mediatek,mtk-musb";
+               reg = <0 0x11200000 0 0x1000>;
+               interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
+               interrupt-names = "mc";
+               phys = <&u2port2 PHY_TYPE_USB2>;
+               dr_mode = "otg";
+               clocks = <&pericfg CLK_PERI_USB0>,
+                        <&pericfg CLK_PERI_USB0_MCU>,
+                        <&pericfg CLK_PERI_USB_SLV>;
+               clock-names = "main","mcu","univpll";
+               power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
+               status = "disabled";
+       };
+
+       u2phy1: t-phy@11210000 {
+               compatible = "mediatek,mt7623-tphy",
+                            "mediatek,generic-tphy-v1";
+               reg = <0 0x11210000 0 0x0800>;
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+               status = "disabled";
+
+               u2port2: usb-phy@11210800 {
+                       reg = <0 0x11210800 0 0x0100>;
+                       clocks = <&topckgen CLK_TOP_USB_PHY48M>;
+                       clock-names = "ref";
+                       #phy-cells = <1>;
+               };
+       };
+
        audsys: clock-controller@11220000 {
                compatible = "mediatek,mt7623-audsys",
                             "mediatek,mt2701-audsys",
index 0735a1fb8ad9ac03042fe0aa9925aa5376f79201..d304b62d24b58df37e5bc656d64a0deb3aea35de 100644 (file)
        clock-names = "ethif";
 };
 
+&usb0 {
+       power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>;
+};
+
 &usb1 {
        power-domains = <&scpsys MT7623A_POWER_DOMAIN_HIF>;
 };