drm/i915/selftests: Split igt_atomic_reset testcase

Split igt_atomic_reset selftests into separate full & engines parts,
so we can move former to the dedicated reset selftests file.

While here change engines test to loop first over atomic phases and
then loop over available engines.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190522193203.23932-3-michal.wajdeczko@intel.com

diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
index a6e7f84bbbe9c23efd653b56432921c506f69462..48a51739b9265956a123f99cc54c512dc3327118 100644 (file)
--- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
@@ -32,6 +32,7 @@
 #include "selftests/igt_gem_utils.h"
 #include "selftests/igt_reset.h"
 #include "selftests/igt_wedge_me.h"
+#include "selftests/igt_atomic.h"
 
 #include "selftests/mock_context.h"
 #include "selftests/mock_drm.h"
@@ -1603,44 +1604,8 @@ err_unlock:
        return err;
 }
 
-static void __preempt_begin(void)
-{
-       preempt_disable();
-}
-
-static void __preempt_end(void)
-{
-       preempt_enable();
-}
-
-static void __softirq_begin(void)
-{
-       local_bh_disable();
-}
-
-static void __softirq_end(void)
-{
-       local_bh_enable();
-}
-
-static void __hardirq_begin(void)
-{
-       local_irq_disable();
-}
-
-static void __hardirq_end(void)
-{
-       local_irq_enable();
-}
-
-struct atomic_section {
-       const char *name;
-       void (*critical_section_begin)(void);
-       void (*critical_section_end)(void);
-};
-
 static int __igt_atomic_reset_engine(struct intel_engine_cs *engine,
-                                    const struct atomic_section *p,
+                                    const struct igt_atomic_section *p,
                                     const char *mode)
 {
        struct tasklet_struct * const t = &engine->execlists.tasklet;
@@ -1665,7 +1630,7 @@ static int __igt_atomic_reset_engine(struct intel_engine_cs *engine,
 }
 
 static int igt_atomic_reset_engine(struct intel_engine_cs *engine,
-                                  const struct atomic_section *p)
+                                  const struct igt_atomic_section *p)
 {
        struct drm_i915_private *i915 = engine->i915;
        struct i915_request *rq;
@@ -1716,79 +1681,43 @@ out:
        return err;
 }
 
-static void force_reset(struct drm_i915_private *i915)
+static int igt_reset_engines_atomic(void *arg)
 {
-       i915_gem_set_wedged(i915);
-       i915_reset(i915, 0, NULL);
-}
-
-static int igt_atomic_reset(void *arg)
-{
-       static const struct atomic_section phases[] = {
-               { "preempt", __preempt_begin, __preempt_end },
-               { "softirq", __softirq_begin, __softirq_end },
-               { "hardirq", __hardirq_begin, __hardirq_end },
-               { }
-       };
        struct drm_i915_private *i915 = arg;
-       intel_wakeref_t wakeref;
+       const typeof(*igt_atomic_phases) *p;
        int err = 0;
 
-       /* Check that the resets are usable from atomic context */
+       /* Check that the engines resets are usable from atomic context */
+
+       if (!intel_has_reset_engine(i915))
+               return 0;
+
+       if (USES_GUC_SUBMISSION(i915))
+               return 0;
 
        igt_global_reset_lock(i915);
        mutex_lock(&i915->drm.struct_mutex);
-       wakeref = intel_runtime_pm_get(i915);
 
        /* Flush any requests before we get started and check basics */
-       force_reset(i915);
-       if (i915_reset_failed(i915))
+       if (!igt_force_reset(i915))
                goto unlock;
 
-       if (intel_has_gpu_reset(i915)) {
-               const typeof(*phases) *p;
-
-               for (p = phases; p->name; p++) {
-                       GEM_TRACE("intel_gpu_reset under %s\n", p->name);
-
-                       p->critical_section_begin();
-                       err = intel_gpu_reset(i915, ALL_ENGINES);
-                       p->critical_section_end();
-
-                       if (err) {
-                               pr_err("intel_gpu_reset failed under %s\n",
-                                      p->name);
-                               goto out;
-                       }
-               }
-
-               force_reset(i915);
-       }
-
-       if (USES_GUC_SUBMISSION(i915))
-               goto unlock;
-
-       if (intel_has_reset_engine(i915)) {
+       for (p = igt_atomic_phases; p->name; p++) {
                struct intel_engine_cs *engine;
                enum intel_engine_id id;
 
                for_each_engine(engine, i915, id) {
-                       const typeof(*phases) *p;
-
-                       for (p = phases; p->name; p++) {
-                               err = igt_atomic_reset_engine(engine, p);
-                               if (err)
-                                       goto out;
-                       }
+                       err = igt_atomic_reset_engine(engine, p);
+                       if (err)
+                               goto out;
                }
        }
 
 out:
        /* As we poke around the guts, do a full reset before continuing. */
-       force_reset(i915);
+       igt_force_reset(i915);
 
 unlock:
-       intel_runtime_pm_put(i915, wakeref);
        mutex_unlock(&i915->drm.struct_mutex);
        igt_global_reset_unlock(i915);
 
@@ -1804,13 +1733,13 @@ int intel_hangcheck_live_selftests(struct drm_i915_private *i915)
                SUBTEST(igt_reset_idle_engine),
                SUBTEST(igt_reset_active_engine),
                SUBTEST(igt_reset_engines),
+               SUBTEST(igt_reset_engines_atomic),
                SUBTEST(igt_reset_queue),
                SUBTEST(igt_reset_wait),
                SUBTEST(igt_reset_evict_ggtt),
                SUBTEST(igt_reset_evict_ppgtt),
                SUBTEST(igt_reset_evict_fence),
                SUBTEST(igt_handle_error),
-               SUBTEST(igt_atomic_reset),
        };
        intel_wakeref_t wakeref;
        bool saved_hangcheck;

diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c b/drivers/gpu/drm/i915/gt/selftest_reset.c
index ef90101bb87a405a6e56bccff591fe0e4882f844..4560ed2751a4fb9c1e811beb66ca25c7288618c6 100644 (file)
--- a/drivers/gpu/drm/i915/gt/selftest_reset.c
+++ b/drivers/gpu/drm/i915/gt/selftest_reset.c
@@ -5,6 +5,7 @@
 
 #include "i915_selftest.h"
 #include "selftests/igt_reset.h"
+#include "selftests/igt_atomic.h"
 
 static int igt_global_reset(void *arg)
 {
@@ -54,11 +55,50 @@ static int igt_wedged_reset(void *arg)
        return i915_reset_failed(i915) ? -EIO : 0;
 }
 
+static int igt_atomic_reset(void *arg)
+{
+       struct drm_i915_private *i915 = arg;
+       const typeof(*igt_atomic_phases) *p;
+       int err = 0;
+
+       /* Check that the resets are usable from atomic context */
+
+       igt_global_reset_lock(i915);
+       mutex_lock(&i915->drm.struct_mutex);
+
+       /* Flush any requests before we get started and check basics */
+       if (!igt_force_reset(i915))
+               goto unlock;
+
+       for (p = igt_atomic_phases; p->name; p++) {
+               GEM_TRACE("intel_gpu_reset under %s\n", p->name);
+
+               p->critical_section_begin();
+               err = intel_gpu_reset(i915, ALL_ENGINES);
+               p->critical_section_end();
+
+               if (err) {
+                       pr_err("intel_gpu_reset failed under %s\n", p->name);
+                       break;
+               }
+       }
+
+       /* As we poke around the guts, do a full reset before continuing. */
+       igt_force_reset(i915);
+
+unlock:
+       mutex_unlock(&i915->drm.struct_mutex);
+       igt_global_reset_unlock(i915);
+
+       return err;
+}
+
 int intel_reset_live_selftests(struct drm_i915_private *i915)
 {
        static const struct i915_subtest tests[] = {
                SUBTEST(igt_global_reset), /* attempt to recover GPU first */
                SUBTEST(igt_wedged_reset),
+               SUBTEST(igt_atomic_reset),
        };
        intel_wakeref_t wakeref;
        int err = 0;

diff --git a/drivers/gpu/drm/i915/selftests/igt_atomic.h b/drivers/gpu/drm/i915/selftests/igt_atomic.h
new file mode 100644 (file)
index 0000000..93ec89f
--- /dev/null
+++ b/drivers/gpu/drm/i915/selftests/igt_atomic.h
@@ -0,0 +1,56 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2018 Intel Corporation
+ */
+
+#ifndef IGT_ATOMIC_H
+#define IGT_ATOMIC_H
+
+#include <linux/preempt.h>
+#include <linux/bottom_half.h>
+#include <linux/irqflags.h>
+
+static void __preempt_begin(void)
+{
+       preempt_disable();
+}
+
+static void __preempt_end(void)
+{
+       preempt_enable();
+}
+
+static void __softirq_begin(void)
+{
+       local_bh_disable();
+}
+
+static void __softirq_end(void)
+{
+       local_bh_enable();
+}
+
+static void __hardirq_begin(void)
+{
+       local_irq_disable();
+}
+
+static void __hardirq_end(void)
+{
+       local_irq_enable();
+}
+
+struct igt_atomic_section {
+       const char *name;
+       void (*critical_section_begin)(void);
+       void (*critical_section_end)(void);
+};
+
+static const struct igt_atomic_section igt_atomic_phases[] = {
+       { "preempt", __preempt_begin, __preempt_end },
+       { "softirq", __softirq_begin, __softirq_end },
+       { "hardirq", __hardirq_begin, __hardirq_end },
+       { }
+};
+
+#endif /* IGT_ATOMIC_H */

diff --git a/drivers/gpu/drm/i915/selftests/igt_reset.c b/drivers/gpu/drm/i915/selftests/igt_reset.c
index 4f31b137c428b7a582d4f23e293742e6817b423f..587df6fd4ffef57f89f9ee9d1b9582977d971b3d 100644 (file)
--- a/drivers/gpu/drm/i915/selftests/igt_reset.c
+++ b/drivers/gpu/drm/i915/selftests/igt_reset.c
@@ -43,3 +43,11 @@ void igt_global_reset_unlock(struct drm_i915_private *i915)
        clear_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags);
        wake_up_all(&i915->gpu_error.reset_queue);
 }
+
+bool igt_force_reset(struct drm_i915_private *i915)
+{
+       i915_gem_set_wedged(i915);
+       i915_reset(i915, 0, NULL);
+
+       return !i915_reset_failed(i915);
+}

diff --git a/drivers/gpu/drm/i915/selftests/igt_reset.h b/drivers/gpu/drm/i915/selftests/igt_reset.h
index 5f0234d045d57b2d9d972ca16110dc3229bdbd1e..363bd853e50fc4ae08abe5a25c57600370c429bc 100644 (file)
--- a/drivers/gpu/drm/i915/selftests/igt_reset.h
+++ b/drivers/gpu/drm/i915/selftests/igt_reset.h
@@ -11,5 +11,6 @@
 
 void igt_global_reset_lock(struct drm_i915_private *i915);
 void igt_global_reset_unlock(struct drm_i915_private *i915);
+bool igt_force_reset(struct drm_i915_private *i915);
 
 #endif