ARM: dts: qcom: sdx65: add missing GCC clocks

The SDX65 GCC clock controller expects two required clocks:
pcie_pipe_clk and usb3_phy_wrapper_gcc_usb30_pipe_clk.  The first one is
provided by existing phy node, but second is not yet implemented.

  qcom-sdx65-mtp.dtb: clock-controller@100000: clocks: [[11, 0], [11, 1], [12]] is too short
  qcom-sdx65-mtp.dtb: clock-controller@100000: clock-names: ['bi_tcxo', 'bi_tcxo_ao', 'sleep_clk'] is too short

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230924183103.49487-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
index ab492c47baaa7191c6c11cb470f926a6f47abcc5..0380caa5db6b41391aadb721dfcfe52c15b231cc 100644 (file)
--- a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
@@ -204,8 +204,16 @@
                gcc: clock-controller@100000 {
                        compatible = "qcom,gcc-sdx65";
                        reg = <0x00100000 0x001f7400>;
-                       clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>;
-                       clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk";
+                       clocks = <&rpmhcc RPMH_CXO_CLK>,
+                                <&rpmhcc RPMH_CXO_CLK_A>,
+                                <&sleep_clk>,
+                                <&pcie_phy>,
+                                <0>;
+                       clock-names = "bi_tcxo",
+                                     "bi_tcxo_ao",
+                                     "sleep_clk",
+                                     "pcie_pipe_clk",
+                                     "usb3_phy_wrapper_gcc_usb30_pipe_clk";
                        #power-domain-cells = <1>;
                        #clock-cells = <1>;
                        #reset-cells = <1>;