arm64: dts: imx8mp: Describe M24C32-D write-lockable page in DH i.MX8MP DHCOM DT

The i.MX8MP DHCOM SoM production rev.200 is populated with M24C32-D
EEPROMs which have Additional Write lockable page at separate I2C
address. Describe the page in DT to make it available.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
index d8963f32ec84cacd49269f76ceef86bea38a4ccb..4ae4fdab461e008d4816816eedb90f91e7d32561 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
@@ -420,6 +420,18 @@
                reg = <0x53>;
        };
 
+       eeprom0wl: eeprom@58 {
+               compatible = "atmel,24c32d-wl"; /* M24C32-D WL page of 0x50 */
+               pagesize = <32>;
+               reg = <0x58>;
+       };
+
+       eeprom1wl: eeprom@5b {
+               compatible = "atmel,24c32d-wl"; /* M24C32-D WL page of 0x53 */
+               pagesize = <32>;
+               reg = <0x5b>;
+       };
+
        ioexp: gpio@74 {
                compatible = "nxp,pca9539";
                reg = <0x74>;