arm64: dts: qcom: sm6115: switch UFS QMP PHY to new style of bindings

Change the UFS QMP PHY to use newer style of QMP PHY bindings (single
resource region, no per-PHY subnodes).

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20231205032552.1583336-5-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index 70a06249b130b616c81e9272710dc08194d7e250..72a833b7cd83ae5ad8740ca82603658974d52222 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -1006,7 +1006,7 @@
                        reg = <0x0 0x04804000 0x0 0x3000>, <0x0 0x04810000 0x0 0x8000>;
                        reg-names = "std", "ice";
                        interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
-                       phys = <&ufs_mem_phy_lanes>;
+                       phys = <&ufs_mem_phy>;
                        phy-names = "ufsphy";
                        lanes-per-direction = <1>;
                        #reset-cells = <1>;
@@ -1047,24 +1047,17 @@
 
                ufs_mem_phy: phy@4807000 {
                        compatible = "qcom,sm6115-qmp-ufs-phy";
-                       reg = <0x0 0x04807000 0x0 0x1c4>;
-                       #address-cells = <2>;
-                       #size-cells = <2>;
-                       ranges;
+                       reg = <0x0 0x04807000 0x0 0x1000>;
 
                        clocks = <&gcc GCC_UFS_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>;
                        clock-names = "ref", "ref_aux";
 
                        resets = <&ufs_mem_hc 0>;
                        reset-names = "ufsphy";
-                       status = "disabled";
 
-                       ufs_mem_phy_lanes: phy@4807400 {
-                               reg = <0x0 0x04807400 0x0 0x098>,
-                                     <0x0 0x04807600 0x0 0x130>,
-                                     <0x0 0x04807c00 0x0 0x16c>;
-                               #phy-cells = <0>;
-                       };
+                       #phy-cells = <0>;
+
+                       status = "disabled";
                };
 
                gpi_dma0: dma-controller@4a00000 {