goto free_pt;
}
- bb = xe_bb_new(&tile->primary_gt, 32, xe->info.supports_usm);
+ bb = xe_bb_new(tile->primary_gt, 32, xe->info.supports_usm);
if (IS_ERR(bb)) {
KUNIT_FAIL(test, "Failed to create batchbuffer: %li\n",
PTR_ERR(bb));
xe_map_wr(xe, &pt->vmap, 0, u32, 0xdeaddead);
expected = 0;
- emit_clear(&tile->primary_gt, bb, xe_migrate_vm_addr(NUM_KERNEL_PDE - 1, 0), 4, 4,
+ emit_clear(tile->primary_gt, bb, xe_migrate_vm_addr(NUM_KERNEL_PDE - 1, 0), 4, 4,
IS_DGFX(xe));
run_sanity_job(m, xe, bb, 1, "Writing to our newly mapped pagetable",
test);
{
const struct rtp_test_case *param = test->param_value;
struct xe_device *xe = test->priv;
- struct xe_gt *gt = &xe_device_get_root_tile(xe)->primary_gt;
+ struct xe_gt *gt = xe_device_get_root_tile(xe)->primary_gt;
struct xe_reg_sr *reg_sr = >->reg_sr;
const struct xe_reg_sr_entry *sre, *sr_entry = NULL;
struct xe_rtp_process_ctx ctx = XE_RTP_PROCESS_CTX_INITIALIZER(gt);
err = xe_tile_alloc(tile);
if (err)
return err;
-
- err = xe_gt_alloc(xe, &tile->primary_gt);
- if (err)
- return err;
}
err = xe_mmio_init(xe);
struct xe_gt *gt;
XE_BUG_ON(gt_id > XE_MAX_TILES_PER_DEVICE);
- gt = &xe->tiles[gt_id].primary_gt;
+
+ gt = xe->tiles[gt_id].primary_gt;
+ if (drm_WARN_ON(&xe->drm, !gt))
+ return NULL;
+
XE_BUG_ON(gt->info.id != gt_id);
XE_BUG_ON(gt->info.type == XE_GT_TYPE_UNINITIALIZED);
*/
static inline struct xe_gt *xe_root_mmio_gt(struct xe_device *xe)
{
- return &xe_device_get_root_tile(xe)->primary_gt;
+ return xe_device_get_root_tile(xe)->primary_gt;
}
static inline bool xe_device_guc_submission_enabled(struct xe_device *xe)
/**
* @primary_gt: Primary GT
*/
- struct xe_gt primary_gt;
+ struct xe_gt *primary_gt;
/* TODO: Add media GT here */
* TODO: Loop over each GT in tile once media GT support is
* re-added
*/
- struct xe_gt *gt = &ggtt->tile->primary_gt;
+ struct xe_gt *gt = ggtt->tile->primary_gt;
/* TODO: vfunc for GuC vs. non-GuC */
#include "xe_wa.h"
#include "xe_wopcm.h"
-int xe_gt_alloc(struct xe_device *xe, struct xe_gt *gt)
+struct xe_gt *xe_gt_alloc(struct xe_tile *tile)
{
- XE_BUG_ON(gt->info.type == XE_GT_TYPE_UNINITIALIZED);
+ struct xe_gt *gt;
+ gt = drmm_kzalloc(&tile_to_xe(tile)->drm, sizeof(*gt), GFP_KERNEL);
+ if (!gt)
+ return ERR_PTR(-ENOMEM);
+
+ gt->tile = tile;
gt->ordered_wq = alloc_ordered_workqueue("gt-ordered-wq", 0);
- return 0;
+ return gt;
}
void xe_gt_sanitize(struct xe_gt *gt)
for_each_if (((hwe__) = (gt__)->hw_engines + (id__)) && \
xe_hw_engine_is_valid((hwe__)))
-int xe_gt_alloc(struct xe_device *xe, struct xe_gt *gt);
+struct xe_gt *xe_gt_alloc(struct xe_tile *tile);
int xe_gt_init_early(struct xe_gt *gt);
int xe_gt_init(struct xe_gt *gt);
int xe_gt_record_default_lrcs(struct xe_gt *gt);
m->batch_base_ofs = xe_migrate_vram_ofs(batch_addr);
if (xe->info.supports_usm) {
- batch = tile->primary_gt.usm.bb_pool->bo;
+ batch = tile->primary_gt->usm.bb_pool->bo;
batch_addr = xe_bo_addr(batch, 0, XE_PAGE_SIZE,
&is_vram);
m->usm_batch_base_ofs = xe_migrate_vram_ofs(batch_addr);
struct xe_migrate *xe_migrate_init(struct xe_tile *tile)
{
struct xe_device *xe = tile_to_xe(tile);
- struct xe_gt *primary_gt = &tile->primary_gt;
+ struct xe_gt *primary_gt = tile->primary_gt;
struct xe_migrate *m;
struct xe_vm *vm;
struct ww_acquire_ctx ww;
u64 dst_ofs, bool dst_is_vram, u32 dst_size,
u64 ccs_ofs, bool copy_ccs)
{
- struct xe_gt *gt = &m->tile->primary_gt;
+ struct xe_gt *gt = m->tile->primary_gt;
u32 flush_flags = 0;
if (xe_device_has_flat_ccs(gt_to_xe(gt)) && !copy_ccs && dst_is_vram) {
struct ttm_resource *src,
struct ttm_resource *dst)
{
- struct xe_gt *gt = &m->tile->primary_gt;
+ struct xe_gt *gt = m->tile->primary_gt;
struct xe_device *xe = gt_to_xe(gt);
struct dma_fence *fence = NULL;
u64 size = src_bo->size;
struct ttm_resource *dst)
{
bool clear_vram = mem_type_is_vram(dst->mem_type);
- struct xe_gt *gt = &m->tile->primary_gt;
+ struct xe_gt *gt = m->tile->primary_gt;
struct xe_device *xe = gt_to_xe(gt);
struct dma_fence *fence = NULL;
u64 size = bo->size;
{
const struct xe_migrate_pt_update_ops *ops = pt_update->ops;
struct xe_tile *tile = m->tile;
- struct xe_gt *gt = &tile->primary_gt;
+ struct xe_gt *gt = tile->primary_gt;
struct xe_device *xe = tile_to_xe(tile);
struct xe_sched_job *job;
struct dma_fence *fence;
int xe_mmio_tile_vram_size(struct xe_tile *tile, u64 *vram_size, u64 *tile_size, u64 *tile_offset)
{
struct xe_device *xe = tile_to_xe(tile);
- struct xe_gt *gt = &tile->primary_gt;
+ struct xe_gt *gt = tile->primary_gt;
u64 offset;
int err;
u32 reg;
#include "regs/xe_gt_regs.h"
#include "xe_device.h"
#include "xe_drv.h"
+#include "xe_gt.h"
#include "xe_macros.h"
#include "xe_module.h"
#include "xe_pci_types.h"
tile->xe = xe;
tile->id = id;
- gt = &tile->primary_gt;
+ tile->primary_gt = xe_gt_alloc(tile);
+ if (IS_ERR(tile->primary_gt))
+ return PTR_ERR(tile->primary_gt);
+
+ gt = tile->primary_gt;
gt->info.id = id; /* FIXME: Determine sensible numbering */
- gt->tile = tile;
gt->info.type = XE_GT_TYPE_MAIN;
gt->info.__engine_mask = graphics_desc->hw_engine_mask;
if (MEDIA_VER(xe) < 13 && media_desc)
/* TLB invalidation must be done before signaling rebind */
if (rebind && !xe_vm_no_dma_fences(vma->vm)) {
- int err = invalidation_fence_init(&tile->primary_gt, ifence, fence,
+ int err = invalidation_fence_init(tile->primary_gt, ifence, fence,
vma);
if (err) {
dma_fence_put(fence);
int err;
/* TLB invalidation must be done before signaling unbind */
- err = invalidation_fence_init(&tile->primary_gt, ifence, fence, vma);
+ err = invalidation_fence_init(tile->primary_gt, ifence, fence, vma);
if (err) {
dma_fence_put(fence);
kfree(ifence);
/* Kernel migration VM shouldn't have a circular loop.. */
if (!(flags & XE_VM_FLAG_MIGRATION)) {
for_each_tile(tile, xe, id) {
- struct xe_gt *gt = &tile->primary_gt;
+ struct xe_gt *gt = tile->primary_gt;
struct xe_vm *migrate_vm;
struct xe_engine *eng;
* FIXME: We potentially need to invalidate multiple
* GTs within the tile
*/
- seqno[id] = xe_gt_tlb_invalidation_vma(&tile->primary_gt, NULL, vma);
+ seqno[id] = xe_gt_tlb_invalidation_vma(tile->primary_gt, NULL, vma);
if (seqno[id] < 0)
return seqno[id];
}
for_each_tile(tile, xe, id) {
if (tile_needs_invalidate & BIT(id)) {
- ret = xe_gt_tlb_invalidation_wait(&tile->primary_gt, seqno[id]);
+ ret = xe_gt_tlb_invalidation_wait(tile->primary_gt, seqno[id]);
if (ret < 0)
return ret;
}