arm: pmu: Share user ABI format mechanism with SPE
authorJames Clark <james.clark@arm.com>
Mon, 11 Dec 2023 16:13:18 +0000 (16:13 +0000)
committerWill Deacon <will@kernel.org>
Tue, 12 Dec 2023 09:46:22 +0000 (09:46 +0000)
This mechanism makes it much easier to define and read new attributes
so move it to the arm_pmu.h header so that it can be shared. At the same
time update the existing format attributes to use it.

GENMASK has to be changed to GENMASK_ULL because the config fields are
64 bits even on arm32 where this will also be used now.

Signed-off-by: James Clark <james.clark@arm.com>
Link: https://lore.kernel.org/r/20231211161331.1277825-7-james.clark@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
drivers/perf/arm_pmuv3.c
drivers/perf/arm_spe_pmu.c
include/linux/perf/arm_pmu.h

index 441bf73ee3d51bdb33bc5b2861457738d68ba707..8a573db81da175af8095cfc7ed7e15e5db65a60d 100644 (file)
@@ -299,20 +299,31 @@ static const struct attribute_group armv8_pmuv3_events_attr_group = {
        .is_visible = armv8pmu_event_attr_is_visible,
 };
 
-PMU_FORMAT_ATTR(event, "config:0-15");
-PMU_FORMAT_ATTR(long, "config1:0");
-PMU_FORMAT_ATTR(rdpmc, "config1:1");
+/* User ABI */
+#define ATTR_CFG_FLD_event_CFG         config
+#define ATTR_CFG_FLD_event_LO          0
+#define ATTR_CFG_FLD_event_HI          15
+#define ATTR_CFG_FLD_long_CFG          config1
+#define ATTR_CFG_FLD_long_LO           0
+#define ATTR_CFG_FLD_long_HI           0
+#define ATTR_CFG_FLD_rdpmc_CFG         config1
+#define ATTR_CFG_FLD_rdpmc_LO          1
+#define ATTR_CFG_FLD_rdpmc_HI          1
+
+GEN_PMU_FORMAT_ATTR(event);
+GEN_PMU_FORMAT_ATTR(long);
+GEN_PMU_FORMAT_ATTR(rdpmc);
 
 static int sysctl_perf_user_access __read_mostly;
 
 static bool armv8pmu_event_is_64bit(struct perf_event *event)
 {
-       return event->attr.config1 & 0x1;
+       return ATTR_CFG_GET_FLD(&event->attr, long);
 }
 
 static bool armv8pmu_event_want_user_access(struct perf_event *event)
 {
-       return event->attr.config1 & 0x2;
+       return ATTR_CFG_GET_FLD(&event->attr, rdpmc);
 }
 
 static struct attribute *armv8_pmuv3_format_attrs[] = {
index d2b0cbf0e0c41e38b187239298ce1a75f4f0384f..b622d75d8c9e43089701a23166fdbcd8d490e34b 100644 (file)
@@ -206,28 +206,6 @@ static const struct attribute_group arm_spe_pmu_cap_group = {
 #define ATTR_CFG_FLD_inv_event_filter_LO       0
 #define ATTR_CFG_FLD_inv_event_filter_HI       63
 
-/* Why does everything I do descend into this? */
-#define __GEN_PMU_FORMAT_ATTR(cfg, lo, hi)                             \
-       (lo) == (hi) ? #cfg ":" #lo "\n" : #cfg ":" #lo "-" #hi
-
-#define _GEN_PMU_FORMAT_ATTR(cfg, lo, hi)                              \
-       __GEN_PMU_FORMAT_ATTR(cfg, lo, hi)
-
-#define GEN_PMU_FORMAT_ATTR(name)                                      \
-       PMU_FORMAT_ATTR(name,                                           \
-       _GEN_PMU_FORMAT_ATTR(ATTR_CFG_FLD_##name##_CFG,                 \
-                            ATTR_CFG_FLD_##name##_LO,                  \
-                            ATTR_CFG_FLD_##name##_HI))
-
-#define _ATTR_CFG_GET_FLD(attr, cfg, lo, hi)                           \
-       ((((attr)->cfg) >> lo) & GENMASK(hi - lo, 0))
-
-#define ATTR_CFG_GET_FLD(attr, name)                                   \
-       _ATTR_CFG_GET_FLD(attr,                                         \
-                         ATTR_CFG_FLD_##name##_CFG,                    \
-                         ATTR_CFG_FLD_##name##_LO,                     \
-                         ATTR_CFG_FLD_##name##_HI)
-
 GEN_PMU_FORMAT_ATTR(ts_enable);
 GEN_PMU_FORMAT_ATTR(pa_enable);
 GEN_PMU_FORMAT_ATTR(pct_enable);
index e2503d48ddee603160e4b9cfbc9b13b4de84869f..b3b34f6670cfb9c93109e6be2c1e6a4652eedb6a 100644 (file)
@@ -183,4 +183,26 @@ void armpmu_free_irq(int irq, int cpu);
 #define ARMV8_SPE_PDEV_NAME "arm,spe-v1"
 #define ARMV8_TRBE_PDEV_NAME "arm,trbe"
 
+/* Why does everything I do descend into this? */
+#define __GEN_PMU_FORMAT_ATTR(cfg, lo, hi)                             \
+       (lo) == (hi) ? #cfg ":" #lo "\n" : #cfg ":" #lo "-" #hi
+
+#define _GEN_PMU_FORMAT_ATTR(cfg, lo, hi)                              \
+       __GEN_PMU_FORMAT_ATTR(cfg, lo, hi)
+
+#define GEN_PMU_FORMAT_ATTR(name)                                      \
+       PMU_FORMAT_ATTR(name,                                           \
+       _GEN_PMU_FORMAT_ATTR(ATTR_CFG_FLD_##name##_CFG,                 \
+                            ATTR_CFG_FLD_##name##_LO,                  \
+                            ATTR_CFG_FLD_##name##_HI))
+
+#define _ATTR_CFG_GET_FLD(attr, cfg, lo, hi)                           \
+       ((((attr)->cfg) >> lo) & GENMASK_ULL(hi - lo, 0))
+
+#define ATTR_CFG_GET_FLD(attr, name)                                   \
+       _ATTR_CFG_GET_FLD(attr,                                         \
+                         ATTR_CFG_FLD_##name##_CFG,                    \
+                         ATTR_CFG_FLD_##name##_LO,                     \
+                         ATTR_CFG_FLD_##name##_HI)
+
 #endif /* __ARM_PMU_H__ */