drm/i915: prefer 3-letter acronym for skylake

We are currently using a mix of platform name and acronym to name the
functions. Let's prefer the acronym as it should be clear what platform
it's about and it's shorter, so it doesn't go over 80 columns in a few
cases. This converts skylake to skl where appropriate.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Jani Nikula <jani.nikula@linux.intel.com>
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191224084012.24241-4-lucas.demarchi@intel.com

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 006b1a297e6fc9f7fabfd01bc1c739dc23b6f45c..8435bc5a7a7498ef0daccc206089741fc4a94f7c 100644 (file)
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1259,7 +1259,7 @@ static void gen11_dsi_post_disable(struct intel_encoder *encoder,
 
        intel_dsc_disable(old_crtc_state);
 
-       skylake_scaler_disable(old_crtc_state);
+       skl_scaler_disable(old_crtc_state);
 }
 
 static enum drm_mode_status gen11_dsi_mode_valid(struct drm_connector *connector,

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index e05ed00af9fcf670c113dea97d75ffb1e6633619..7e8e20ff008d7a5876457f2c93f6dd558a53271c 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3914,7 +3914,7 @@ static void intel_ddi_post_disable(struct intel_encoder *encoder,
        intel_dsc_disable(old_crtc_state);
 
        if (INTEL_GEN(dev_priv) >= 9)
-               skylake_scaler_disable(old_crtc_state);
+               skl_scaler_disable(old_crtc_state);
        else
                ironlake_pfit_disable(old_crtc_state);
 

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 6836b170504dc3a3fb1d9391b995ab1ee8255efe..15f5d8b2210d0734b67ae8f394f3796bb45df445 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -165,7 +165,7 @@ static void vlv_prepare_pll(struct intel_crtc *crtc,
                            const struct intel_crtc_state *pipe_config);
 static void chv_prepare_pll(struct intel_crtc *crtc,
                            const struct intel_crtc_state *pipe_config);
-static void skylake_pfit_enable(const struct intel_crtc_state *crtc_state);
+static void skl_pfit_enable(const struct intel_crtc_state *crtc_state);
 static void ironlake_pfit_enable(const struct intel_crtc_state *crtc_state);
 static void intel_modeset_setup_hw_state(struct drm_device *dev,
                                         struct drm_modeset_acquire_ctx *ctx);
@@ -6002,7 +6002,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
        return 0;
 }
 
-void skylake_scaler_disable(const struct intel_crtc_state *old_crtc_state)
+void skl_scaler_disable(const struct intel_crtc_state *old_crtc_state)
 {
        struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
        int i;
@@ -6011,7 +6011,7 @@ void skylake_scaler_disable(const struct intel_crtc_state *old_crtc_state)
                skl_detach_scaler(crtc, i);
 }
 
-static void skylake_pfit_enable(const struct intel_crtc_state *crtc_state)
+static void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
 {
        struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
        struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -6828,7 +6828,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
                glk_pipe_scaler_clock_gating_wa(dev_priv, pipe, true);
 
        if (INTEL_GEN(dev_priv) >= 9)
-               skylake_pfit_enable(new_crtc_state);
+               skl_pfit_enable(new_crtc_state);
        else
                ironlake_pfit_enable(new_crtc_state);
 
@@ -10100,8 +10100,8 @@ static void ironlake_get_fdi_m_n_config(struct intel_crtc *crtc,
                                     &pipe_config->fdi_m_n, NULL);
 }
 
-static void skylake_get_pfit_config(struct intel_crtc *crtc,
-                                   struct intel_crtc_state *pipe_config)
+static void skl_get_pfit_config(struct intel_crtc *crtc,
+                               struct intel_crtc_state *pipe_config)
 {
        struct drm_device *dev = crtc->base.dev;
        struct drm_i915_private *dev_priv = to_i915(dev);
@@ -10132,8 +10132,8 @@ static void skylake_get_pfit_config(struct intel_crtc *crtc,
 }
 
 static void
-skylake_get_initial_plane_config(struct intel_crtc *crtc,
-                                struct intel_initial_plane_config *plane_config)
+skl_get_initial_plane_config(struct intel_crtc *crtc,
+                            struct intel_initial_plane_config *plane_config)
 {
        struct drm_device *dev = crtc->base.dev;
        struct drm_i915_private *dev_priv = to_i915(dev);
@@ -10501,9 +10501,8 @@ static void bxt_get_ddi_pll(struct drm_i915_private *dev_priv,
        pipe_config->shared_dpll = intel_get_shared_dpll_by_id(dev_priv, id);
 }
 
-static void skylake_get_ddi_pll(struct drm_i915_private *dev_priv,
-                               enum port port,
-                               struct intel_crtc_state *pipe_config)
+static void skl_get_ddi_pll(struct drm_i915_private *dev_priv, enum port port,
+                           struct intel_crtc_state *pipe_config)
 {
        enum intel_dpll_id id;
        u32 temp;
@@ -10731,7 +10730,7 @@ static void hsw_get_ddi_port_state(struct intel_crtc *crtc,
        else if (IS_CANNONLAKE(dev_priv))
                cannonlake_get_ddi_pll(dev_priv, port, pipe_config);
        else if (IS_GEN9_BC(dev_priv))
-               skylake_get_ddi_pll(dev_priv, port, pipe_config);
+               skl_get_ddi_pll(dev_priv, port, pipe_config);
        else if (IS_GEN9_LP(dev_priv))
                bxt_get_ddi_pll(dev_priv, port, pipe_config);
        else
@@ -10906,7 +10905,7 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
                power_domain_mask |= BIT_ULL(power_domain);
 
                if (INTEL_GEN(dev_priv) >= 9)
-                       skylake_get_pfit_config(crtc, pipe_config);
+                       skl_get_pfit_config(crtc, pipe_config);
                else
                        ironlake_get_pfit_config(crtc, pipe_config);
        }
@@ -14510,7 +14509,7 @@ static void intel_pipe_fastset(const struct intel_crtc_state *old_crtc_state,
                skl_detach_scalers(new_crtc_state);
 
                if (new_crtc_state->pch_pfit.enabled)
-                       skylake_pfit_enable(new_crtc_state);
+                       skl_pfit_enable(new_crtc_state);
        } else if (HAS_PCH_SPLIT(dev_priv)) {
                if (new_crtc_state->pch_pfit.enabled)
                        ironlake_pfit_enable(new_crtc_state);
@@ -16917,7 +16916,7 @@ void intel_init_display_hooks(struct drm_i915_private *dev_priv)
        if (INTEL_GEN(dev_priv) >= 9) {
                dev_priv->display.get_pipe_config = hsw_get_pipe_config;
                dev_priv->display.get_initial_plane_config =
-                       skylake_get_initial_plane_config;
+                       skl_get_initial_plane_config;
                dev_priv->display.crtc_compute_clock = hsw_crtc_compute_clock;
                dev_priv->display.crtc_enable = hsw_crtc_enable;
                dev_priv->display.crtc_disable = hsw_crtc_disable;

diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 0fef9263cddcc6bac5775093662ec07a86b5b1b1..921a584c32843e24731729f057e0f12448ff0ea1 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -578,7 +578,7 @@ void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc,
 
 u16 skl_scaler_calc_phase(int sub, int scale, bool chroma_center);
 int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state);
-void skylake_scaler_disable(const struct intel_crtc_state *old_crtc_state);
+void skl_scaler_disable(const struct intel_crtc_state *old_crtc_state);
 void ironlake_pfit_disable(const struct intel_crtc_state *old_crtc_state);
 u32 glk_plane_color_ctl(const struct intel_crtc_state *crtc_state,
                        const struct intel_plane_state *plane_state);

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 9251d47f8fe65990d8d3f78518ad7d7fedba19ed..ca38c0cb0b32ae01627dd3d812e9f75d9785d526 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -374,7 +374,7 @@ static void intel_mst_post_disable_dp(struct intel_encoder *encoder,
        intel_ddi_disable_transcoder_func(old_crtc_state);
 
        if (INTEL_GEN(dev_priv) >= 9)
-               skylake_scaler_disable(old_crtc_state);
+               skl_scaler_disable(old_crtc_state);
        else
                ironlake_pfit_disable(old_crtc_state);
 

diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
index 21e820299107e159e24c43a9139fef35f2f9874a..70ab378803c46b217cc7da2a5fa297695bfab8ee 100644 (file)
--- a/drivers/gpu/drm/i915/display/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
@@ -895,7 +895,7 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder,
        if (IS_GEN9_LP(dev_priv)) {
                intel_crtc_vblank_off(old_crtc_state);
 
-               skylake_scaler_disable(old_crtc_state);
+               skl_scaler_disable(old_crtc_state);
        }
 
        if (is_vid_mode(intel_dsi)) {

diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
index 893249ea48d4fb710b6e252dde06490165bb1b14..cbdeda608359e3ddddce2327e02cdaccb8d4616e 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_mocs.c
+++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
@@ -127,7 +127,7 @@ struct drm_i915_mocs_table {
                   LE_0_PAGETABLE | LE_TC_2_LLC_ELLC | LE_LRUM(3), \
                   L3_3_WB)
 
-static const struct drm_i915_mocs_entry skylake_mocs_table[] = {
+static const struct drm_i915_mocs_entry skl_mocs_table[] = {
        GEN9_MOCS_ENTRIES,
        MOCS_ENTRY(I915_MOCS_CACHED,
                   LE_3_WB | LE_TC_2_LLC_ELLC | LE_LRUM(3),
@@ -292,9 +292,9 @@ static bool get_mocs_settings(const struct drm_i915_private *i915,
                table->table = icelake_mocs_table;
                table->n_entries = GEN11_NUM_MOCS_ENTRIES;
        } else if (IS_GEN9_BC(i915) || IS_CANNONLAKE(i915)) {
-               table->size  = ARRAY_SIZE(skylake_mocs_table);
+               table->size  = ARRAY_SIZE(skl_mocs_table);
                table->n_entries = GEN9_NUM_MOCS_ENTRIES;
-               table->table = skylake_mocs_table;
+               table->table = skl_mocs_table;
        } else if (IS_GEN9_LP(i915)) {
                table->size  = ARRAY_SIZE(broxton_mocs_table);
                table->n_entries = GEN9_NUM_MOCS_ENTRIES;