drm/amdgpu: update ta_secureDisplay_if.h to v27.00.00.08
authorAaron Liu <aaron.liu@amd.com>
Wed, 4 Jan 2023 01:18:06 +0000 (09:18 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 5 Jan 2023 16:43:46 +0000 (11:43 -0500)
1. Rename securedisplay_cmd to ta_securedisplay_cmd.
2. Rename ta_securedisplay_max_phy to ta_securedisplay_phy_ID.
3. update securedisplay_cmd to ta_securedisplay_cmd

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Shane Xiao <shane.xiao@amd.com>
Reviewed-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
drivers/gpu/drm/amd/amdgpu/amdgpu_securedisplay.c
drivers/gpu/drm/amd/amdgpu/amdgpu_securedisplay.h
drivers/gpu/drm/amd/amdgpu/ta_secureDisplay_if.h
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c

index 0706afb11577d9770a22f816205d9a0390e56421..2bebda7de604010674128aa0bc4a98270699bcd2 100644 (file)
@@ -1907,7 +1907,7 @@ out_unlock:
 static int psp_securedisplay_initialize(struct psp_context *psp)
 {
        int ret;
-       struct securedisplay_cmd *securedisplay_cmd;
+       struct ta_securedisplay_cmd *securedisplay_cmd;
 
        /*
         * TODO: bypass the initialize in sriov for now
index 2c1d82fc4c3456dc4cb895c863f77306058aa61a..8ed0e073656f8821926f0627111920940f79a17d 100644 (file)
@@ -77,11 +77,11 @@ void psp_securedisplay_parse_resp_status(struct psp_context *psp,
        }
 }
 
-void psp_prep_securedisplay_cmd_buf(struct psp_context *psp, struct securedisplay_cmd **cmd,
+void psp_prep_securedisplay_cmd_buf(struct psp_context *psp, struct ta_securedisplay_cmd **cmd,
        enum ta_securedisplay_command command_id)
 {
-       *cmd = (struct securedisplay_cmd *)psp->securedisplay_context.context.mem_context.shared_buf;
-       memset(*cmd, 0, sizeof(struct securedisplay_cmd));
+       *cmd = (struct ta_securedisplay_cmd *)psp->securedisplay_context.context.mem_context.shared_buf;
+       memset(*cmd, 0, sizeof(struct ta_securedisplay_cmd));
        (*cmd)->status = TA_SECUREDISPLAY_STATUS__GENERIC_FAILURE;
        (*cmd)->cmd_id = command_id;
 }
@@ -93,7 +93,7 @@ static ssize_t amdgpu_securedisplay_debugfs_write(struct file *f, const char __u
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)file_inode(f)->i_private;
        struct psp_context *psp = &adev->psp;
-       struct securedisplay_cmd *securedisplay_cmd;
+       struct ta_securedisplay_cmd *securedisplay_cmd;
        struct drm_device *dev = adev_to_drm(adev);
        uint32_t phy_id;
        uint32_t op;
index fe98574748f440238eab697c8b9a9190ef02a1f0..456ad68ed4b2f454e0a11a6c4c27045f8155ba4d 100644 (file)
@@ -30,7 +30,7 @@
 void amdgpu_securedisplay_debugfs_init(struct amdgpu_device *adev);
 void psp_securedisplay_parse_resp_status(struct psp_context *psp,
                enum ta_securedisplay_status status);
-void psp_prep_securedisplay_cmd_buf(struct psp_context *psp, struct securedisplay_cmd **cmd,
+void psp_prep_securedisplay_cmd_buf(struct psp_context *psp, struct ta_securedisplay_cmd **cmd,
                enum ta_securedisplay_command command_id);
 
 #endif
index cf8ff064dc72e901e211b4aa76210d716ad6e5a2..00d8bdb8254fb5d8e7aafc3a10867b5fb95d70d4 100644 (file)
@@ -55,10 +55,10 @@ enum ta_securedisplay_status {
        TA_SECUREDISPLAY_STATUS__MAX                     = 0x7FFFFFFF,/* Maximum Value for status*/
 };
 
-/** @enum ta_securedisplay_max_phy
+/** @enum ta_securedisplay_phy_ID
  *    Physical ID number to use for reading corresponding DIO Scratch register for ROI
  */
-enum  ta_securedisplay_max_phy {
+enum  ta_securedisplay_phy_ID {
        TA_SECUREDISPLAY_PHY0                           = 0,
        TA_SECUREDISPLAY_PHY1                           = 1,
        TA_SECUREDISPLAY_PHY2                           = 2,
@@ -139,16 +139,16 @@ union ta_securedisplay_cmd_output {
        uint32_t                                           reserved[4];
 };
 
-/** @struct securedisplay_cmd
- *    Secure Display Command which is shared buffer memory
- */
-struct securedisplay_cmd {
-       uint32_t                             cmd_id;                    /* +0  Bytes Command ID */
-       enum ta_securedisplay_status         status;     /* +4  Bytes Status of Secure Display TA */
-       uint32_t                             reserved[2];               /* +8  Bytes Reserved */
-       union ta_securedisplay_cmd_input     securedisplay_in_message;  /* +16 Bytes Input Buffer */
-       union ta_securedisplay_cmd_output    securedisplay_out_message;/* +32 Bytes Output Buffer */
-       /**@note Total 48 Bytes */
+/** @struct ta_securedisplay_cmd
+*    Secure display command which is shared buffer memory
+*/
+struct ta_securedisplay_cmd {
+    uint32_t                                           cmd_id;                         /**< +0  Bytes Command ID */
+    enum ta_securedisplay_status                       status;                         /**< +4  Bytes Status code returned by the secure display TA */
+    uint32_t                                           reserved[2];                    /**< +8  Bytes Reserved */
+    union ta_securedisplay_cmd_input                   securedisplay_in_message;       /**< +16 Bytes Command input buffer */
+    union ta_securedisplay_cmd_output                  securedisplay_out_message;      /**< +32 Bytes Command output buffer */
+    /**@note Total 48 Bytes */
 };
 
 #endif   //_TA_SECUREDISPLAY_IF_H
index ad73e5855580ec2999ee533545ea87d7266ce5c5..8841c447d0e24bd3c308ea8a0a492e3fd126b3a5 100644 (file)
@@ -103,7 +103,7 @@ static void amdgpu_dm_crtc_notify_ta_to_read(struct work_struct *work)
 {
        struct secure_display_context *secure_display_ctx;
        struct psp_context *psp;
-       struct securedisplay_cmd *securedisplay_cmd;
+       struct ta_securedisplay_cmd *securedisplay_cmd;
        struct drm_crtc *crtc;
        struct dc_stream_state *stream;
        uint8_t phy_inst;